ML Enhanced

Qualcomm-posted about 2 months ago

Full-time • Mid Level

Santa Clara, CA

5,001-10,000 employees

Computer and Electronic Product Manufacturing

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Join Qualcomm's Connectivity functional verification team to drive pre-silicon verification and post-silicon bring-up of high-performance RFICs for Wi-Fi, BT, UWB, FM, GNSS, and IoT applications. This role emphasizes integrating AI/ML into traditional verification workflows to accelerate design cycles and improve quality.

Develop and debug behavioral models for event-driven and mixed-signal simulation based on analog circuit design.
Create verification plans for radio and IP modules interfacing with SoC.
Build self-checking test benches and define test coverages and sequences.
Maintain scripts for netlist release and programming instruction generation.
Diagnose failed tests and manage bug tracking and resolution.
Contribute to methodology development, especially in AI/ML-enhanced verification flows.
Apply ML models to predict boundary values and optimize test coverage early in the design cycle.

Bachelor's degree in Electrical Engineering with 3+ years of experience in RF/Analog circuit design for wireless products (e.g., LNAs, PLLs) and 4+ years in ASIC design, verification, or related work.
OR Master's degree in Electrical Engineering or related field with 4+ years of ASIC design/verification experience.
OR PhD in Electrical Engineering or related field with 2+ years of ASIC design/verification experience.
2+ years of experience using tools such as CADENCE, Virtuoso, ADS.
1+ years of experience applying AI/ML techniques to circuit modeling, simulation, or verification workflows.
Strong understanding of RF-analog and digital logic design.
Proficient in SystemVerilog, Python, Perl, C-Shell, and Cadence SKILL.
Experience with Cadence AMS/XCelium tools.
Familiarity with serial bus interfaces, register controllers, and state machines.
Knowledge of RF transceiver architectures, PLLs, ADCs, DACs.
Experience with UVM and functional verification of RF/mixed-signal chips.
AI/ML Fundamentals: Understanding of supervised/unsupervised learning, neural networks, and ML-based optimization.
Experience with ML libraries such as TensorFlow, PyTorch, Scikit-learn, and EDA-specific ML tools.
Ability to tailor ML models to analog/RF design topologies and verification tasks.
Experience with Prompt Engineering for AI/ML model interaction and optimization.
Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree or higher in Electrical Engineering, Computer Engineering, or Computer Science preferred. Coursework or thesis in Analog/RF/Mixed-Signal Design and Machine Learning is a strong plus.

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RF/Analog Design/Functional Modeling and Verification Engineer - AI/ML Enhanced

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