Radio Frequency (RF) Architect, Texas Institute for Electronics

The University of Texas at AustinAustin, TX
2dHybrid

About The Position

Texas Institute for Electronics (TIE) is a transformative, well-funded semiconductor foundry venture combining the agility of a startup with the scale of a national initiative. A key part of our mission is to advance the state of the art in 3D heterogeneous integration (3DHI), chiplet-based architectures, and multi-component microsystems- catalyzing breakthroughs across microelectronics, artificial intelligence, quantum computing, high-performance computing, and next-generation healthcare devices. Backed by $1.4 billion in combined funding from DARPA, Texas state initiatives, and strategic partners, we are building foundational capabilities in advanced packaging and integrated design infrastructure to restore U.S. leadership in microelectronics manufacturing. Our 3DHI and chiplet integration platforms integrate novel thermal management and advanced interconnect solutions to deliver unprecedented performance and energy efficiency. Operating at the intersection of defense electronics and commercial markets, TIE offers a rare opportunity to reimagine an industry from the ground up and build transformative products with global impact. This role will develop advanced RF and mixed-signal microsystems for high-performance communication, radar, and sensing applications. This includes defining RF front-end architectures, leading EM/circuit co-simulation, overseeing RF testing, and collaborating with partners to define design enablement requirements for next-generation RF packaging.

Requirements

  • M.S. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter-wave design.
  • At least 8 years of hands-on experience designing, simulating, and testing RF/microwave ICs or modules (K-band and above).
  • Deep expertise in S-parameter characterization, on-wafer measurements, vector network analysis, and de-embedding methodologies.
  • Proficiency with RF simulation and design tools such as Keysight ADS, Ansys HFSS, Cadence AWR, CST Studio, or equivalent.
  • Strong understanding of electromagnetic effects in packaging—signal integrity, coupling, and loss across interposers and redistribution layers.
  • Proven track record in RF testing automation, data analysis, and test correlation between EM models and measured results.
  • Ability to work cross-functionally with device, packaging, EDA, and system teams in a fast-moving R&D environment.
  • Location: Austin, Texas is preferred for close collaboration with our engineering teams and partners. Hybrid work arrangements may be possible with travel up to 30–50%. Such arrangements are subject to University review and approval in relation to jurisdictional employment-related laws, rules, and regulations.
  • Relevant education and experience may be substituted as appropriate.

Nice To Haves

  • Ph,D. in Electrical Engineering, Applied Physics, or related discipline focused on RF, microwave, or millimeter-wave design.
  • More than 8 years of hands-on experience designing, simulating, and testing RF/microwave ICs or modules (K-band and above).
  • Experience developing Antenna-in-Package (AiP), RFIC/SiP, or 3D-stacked RF front-end modules for advanced communications or sensing.
  • Familiarity with 3DHI design flows and RF/mixed-signal co-simulation using advanced EDA environments (Cadence, Synopsys, Siemens, Ansys).
  • Hands-on experience with wafer-level probing, cryogenic testing, or thermal-vacuum characterization for high-frequency systems.
  • Knowledge of GaAs, GaN, SiGe, or CMOS RF processes, and packaging constraints for high-frequency operation
  • Publication or patent record in millimeter-wave circuits, antennas, or RF packaging.
  • Strong technical writing and presentation skills for industry and defense-sector collaborations.

Responsibilities

  • Architect RF and mixed-signal microsystems operating across K-band (18–27 GHz), Ka-band (27–40 GHz), and W-band (75–110 GHz) for high-performance, low-latency communication, radar, and sensing applications.
  • Define and drive RF front-end architectures, including LNAs, PAs, mixers, phase shifters, and T/R modules, optimized for 3.0D integration and advanced packaging flows.
  • Collaborate with device, packaging, and digital architects to achieve co-optimization of RF, thermal, and mechanical performance within heterogeneous multi-die systems.
  • Lead EM/circuit co-simulation and system-level modeling using tools such as HFSS, ADS, AWR, or CST to validate and tune design performance across process corners and temperature.
  • Oversee RF testing, characterization, and calibration at wafer, die, and module levels—developing test plans, de-embedding strategies, and measurement automation for K/W-band hardware.
  • Engage with foundry, EDA, and metrology partners to define design enablement requirements for next-generation RF packaging (e.g., hybrid bonding, AiP, glass/Si interposers).
  • Author technical documentation, reference designs, and design guidelines to accelerate ecosystem adoption of TIE’s 3.0D RF microsystems platform.
  • Other related functions as assigned.

Benefits

  • Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
  • Voluntary Vision, Dental, Life, and Disability insurance options
  • Generous paid vacation, sick time, and holidays
  • Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
  • Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
  • Flexible spending account options for medical and childcare expenses
  • Robust free training access through LinkedIn Learning plus professional conference opportunities
  • Tuition assistance
  • Expansive employee discount program including athletic tickets
  • Free access to UT Austin's libraries and museums with staff ID card
  • Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card

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What This Job Offers

Job Type

Full-time

Career Level

Mid Level

Number of Employees

5,001-10,000 employees

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