Radar FPGA Engineer III - Lunar Permanence

Blue Origin•Seattle, WA

1d•$116,323 - $177,657

About The Position

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! This role is part of the Lunar Permanence business unit, which develops Blue Origin’s Blue Moon landers and related products. To further Blue Origin's mission of millions of people living and working in space for the benefit of Earth, we are building sustainable infrastructure for our transport of crew and cargo from Earth to the lunar surface. You will work closely with the guidance, navigation, and control (GN&C) team to seamlessly integrate these components with the rest of the GN&C subsystem. This role is deeply interdisciplinary and requires coordination among a group of internal stakeholders, adjacent integrated product teams, and suppliers. Your contributions will enable flight of state-of-the-art aerospace vehicles and missions. Passion for our mission and vision is required! What you will do: Design and simulation of end-to-end systems to meet required performance specification such as range and signal-to-noise ratio Design and validate signal processing algorithm for applications of detection, tracking, RF calibration, parameter estimation. Support Matlab/Simulink Code generation for signal processing and filtering Analysis of algorithmic computational complexity and hardware resource needs (FPGA fabric, memory/IO bandwidth, etc.). Signal-to-Noise/Clutter Ratio, Signal Sensitivity, RF nonlinearity calibration Work with hardware engineers to drive device selection : FPGA, ADC/DAC, DDR3/4, NOR flash, etc. Support HW bring-up and work alongside EE engineers to support design verification RTL logic implementation and FPGA prototyping

Requirements

B.S. in Electrical Engineering or a related field with 5+ years of DSP experiences
Experience in developing and implementing DSP algorithm on FPGA and/or embedded processor
Experience in simulating an end-to-end system to meet required performance specifications, such as link budget.
Proficient with Matlab/Simulink, or equivalent modeling environment
Experience in designing, choosing, and optimizing DSP algorithms for radar or other relevant sensors
Proficient with IEEE 802.3, XAUI, PCIe, JESD204B/C, I2C, SPI interfaces
Proficient in writing RTL using Verilog/SystemVerilog/VHDL (SystemVerilog desired).
Strong understanding of FPGA design concepts, CDC, constraint definition, STA, and timing closure.
Proficient with FPGA development tools such as Xilinx Vivado, Intel Quartus.
Proficient with ModelSim/QuestaSim or equivalent simulators.
Experience in writing testbenches utilizing techniques such as UVM/OVM, SV Assertion, and/or functional/code coverage analysis.

Nice To Haves

PhD or master’s degree in electrical engineering, mathematics, signal processing or a related field
Experience in FMCW or CW Radar/LiDAR signal processing
Proficient with scripting languages like Perl, Python, or Tcl is a plus
Experience with common on-chip bus protocols such as AMBA (AXI, AHB, APB), PCIe, JESD204B/C, I2C, (Q)SPI, etc.
Experience with RF sensors.
Experience with space applications and radiation environment.

Responsibilities

Design and simulation of end-to-end systems to meet required performance specification such as range and signal-to-noise ratio
Design and validate signal processing algorithm for applications of detection, tracking, RF calibration, parameter estimation.
Support Matlab/Simulink Code generation for signal processing and filtering
Analysis of algorithmic computational complexity and hardware resource needs (FPGA fabric, memory/IO bandwidth, etc.).
Signal-to-Noise/Clutter Ratio, Signal Sensitivity, RF nonlinearity calibration
Work with hardware engineers to drive device selection : FPGA, ADC/DAC, DDR3/4, NOR flash, etc.
Support HW bring-up and work alongside EE engineers to support design verification
RTL logic implementation and FPGA prototyping

Benefits

Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.

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