Principal Silicon Photonics Packaging Engineer

Coherent Corp•Fremont, CA

51d•Onsite

About The Position

Drive Co-Packaged Optics and Optical Engine product packaging activities from initial concept to production. Develop Silicon Photonic (PIC) and electronics IC (EIC) co-design process flow, PIC and EIC IO pad frame and 3D interposer floor plan. Lead PIC and EIC interconnect schematic and monitor layout design process. Work with OSAT's to define PIC and EIC hybrid integration packaging design rules, process flow, and material sets. Lead optical package development to establish package manufacturability and reliability. Collaborate with cross-functional teams consisting of Silicon Photonics, IC design, substrate layout, and module design teams.

Requirements

Bachelor's degree with 9 years of related experience in optical and IC packaging.
Or Master's degree with 7 years; or a PhD with 4 years experience.
Expertise in advanced IC packaging design, FOWLP, RDL, bumping, flip-chip.
Experience with high-speed differential and single ended impedance-controlled signal routing.
Experience with Silicon Photonics IC packaging.
Experience with organic substrate design and packaging.

Responsibilities

Drive Co-Packaged Optics and Optical Engine product packaging activities from initial concept to production.
Develop Silicon Photonic (PIC) and electronics IC (EIC) co-design process flow, PIC and EIC IO pad frame and 3D interposer floor plan.
Lead PIC and EIC interconnect schematic and monitor layout design process.
Work with OSAT's to define PIC and EIC hybrid integration packaging design rules, process flow, and material sets.
Lead optical package development to establish package manufacturability and reliability.
Collaborate with cross-functional teams consisting of Silicon Photonics, IC design, substrate layout, and module design teams.

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