Principal Silicon Firmware, Algorithms & Power Architect

Advanced Micro Devices, Inc•Austin, TX

5d•Hybrid

About The Position

AMD’s Computing and Graphics business unit is seeking a Principal‑level technical leader to drive next‑generation power architecture, firmware, algorithms, and software interfaces across AMD client and handheld SoCs. In this highly influential role, you will help define the power‑management architecture for future AMD platforms—driving innovation from early concept and definition, through design execution, and into post‑silicon validation. You will collaborate closely with SoC and platform architects, IP and physical design teams, software and firmware engineering, silicon validation, and packaging teams to deliver breakthrough improvements in power efficiency, performance‑per‑watt, and battery life. This is an opportunity to have a direct and visible impact on AMD’s most advanced products. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think-tank, and negotiate amongst design teams, marketing, and business unit executives.

Requirements

PhD or MS in Electrical Engineering, Computer Engineering, Computer Science, Physics, or a related technical field.
Several years of relevant experience in SoC architecture, firmware, algorithms, or power‑management domains.
Excellent written and verbal communication skills; ability to lead and influence teams across geographies.
Clear, methodical problem solver comfortable driving complex initiatives independently.

Nice To Haves

Experience profiling software workloads on CPUs and GPUs.
Knowledge of defining low‑level software interfaces to influence hardware performance and power behavior.
Background in SOC hardware design, clock distribution, power delivery and performance
Experience profiling and tuning hardware/software stacks to achieve power and performance efficiency on benchmark workloads
Prior algorithm development in C or Python; MATLAB experience preferred.
Expertise in algorithm development for predictive systems using regression and classification frameworks for complex datasets.
Experience with system and SoC control firmware, including RTOS and bare‑metal development.
Familiarity with ACPI, UEFI, and platform‑level power management frameworks.
Demonstrated expertise in system and SoC power optimization techniques.
Experience with software tracing, firmware debugging, and activity profiling tools.
Windows OS and kernel‑level knowledge, including power frameworks, drivers, and system activity tracing.

Responsibilities

Algorithm, Firmware & Software Interface Architecture
Develop and architect new power algorithms and software features using state‑of‑the‑art techniques, including classifiers, regression models, machine learning approaches for CPU/GPU power and performance optimization.
Define and implement software interfaces that influence and optimize hardware behavior across the SoC.
Prototype and develop new firmware for complex power‑control algorithms throughout the SoC roadmap.
Performance & Workload Optimization
Profile emerging NN and LLM (Agentic) workloads on client platforms; tune algorithms to optimize power during active, high‑load, and interactive usage scenarios.
Analyze power and performance benchmarks to identify opportunities for efficiency improvements.
System‑Level Power Architecture
Architect, implement, and optimize control software and firmware features to achieve product-level power targets.
Drive cross‑organization alignment for innovative power‑reduction methodologies and ensure convergence across design teams.
Collaborate with global architecture and design teams to implement and validate SoC power‑management solutions.
Optimize real PC use cases for both absolute power and performance‑per‑watt.
Hands‑On Engineering
Work directly with development boards to prototype new features and evaluate new power features.
Conduct software tracing, firmware debugging, and activity profiling to diagnose issues and drive improvements.