Principal Silicon Design Engineer

Advanced Micro Devices-posted 3 months ago
Hybrid • Santa Clara, CA
5,001-10,000 employees
Computer and Electronic Product Manufacturing
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The SOC RTG team develops leading edge discrete graphics SOCs. The team owns SOC execution and is actively engaged from architecture to production. Working as part of the SOC leadership team, candidates will gain knowledge in system and IP level design, SOC architecture and implementation strategies.

  • Integrate AMD internal IPs RTL/DV environments into SoC
  • Debug function/performance of Graphics, Display, SMU IPs
  • Engage with IP and SOC teams to drive closure to IP RTL deliverables
  • Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation
  • Drive design and methodology improvements across teams to improve overall program execution
  • Proficiency with Verilog/VHDL RTL design languages
  • Knowledge of chip bus interfaces such as AHB, AXI and various standard peripherals & interfaces is required
  • ASIC DV experience in reusable verification methodology such as UVM
  • Have hands-on experience in SOC Design/Integration activities, involving IPs, padring and pinmuxing
  • Have knowledge of SOC design specification, architecture and micro-architecture, ASIC, SOC, and IP Verification.
  • Strong industry experience in Synthesis, Floor-planning, Placement, clock trees synthesis, Post Route Timing closure for high-speed designs.
  • CDC, PTPX, STA, LINT & DFT, IP, Physical design flow & scripting in TCL, Python
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