Northrop Grumman-posted 3 months ago
$105,400 - $158,000/Yr
Full-time • Senior

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. At the heart of Defining Possible is our commitment to missions. In rapidly changing global security environments, Northrop Grumman brings informed insights and software-secure technology to enable strategic planning. We’re looking for innovators who can help us keep building on our wide portfolio of secure, affordable, integrated, and multi-domain systems and technologies that fuel those missions. By joining in our shared mission, we’ll support you by expanding your personal network and developing skills, whether you are new to the field, or an industry thought leader. At Northrop Grumman, you’ll have the resources, support, and team to do some of the best work of your career. We are looking for you to join our team as a Principal Mixed Signal Verification Engineer/Senior Principal Mixed Signal Verification Engineer based out of Linthicum, MD (BWI). The Electrical Devices and Integrated Circuit (EDIC) group at Northrop Grumman Corporation delivers full-custom Integrated Circuit (ICs) to provide the core functionality of our Advanced Multifunction Sensor products that are used in Radar, Electronic Warfare (EW) & Other applications. These ICs are mixed signals in nature with content that spans RF, Analog, and Digital signal domains. The top-level simulations will also include synthesizable RTL code along with RF/Analog components.

  • Develop behavioral models for Analog, RF, Digital and IO blocks that are common to RFICs, Readout IC (ROIC)s used in Focal Plane Array (FPA) for imaging, Power Controller IC, Up/Down converters, Filters, and Regulator chips.
  • Develop the top-level simulation environment for an individual chip and multi-chip systems using the Virtuoso and Xcelium tools from Cadence.
  • Be open to learning all aspects of a chip (RF, analog, Digital, and IOs) and developing behavioral models, capable of simultaneously supporting multiple unique designs in a dynamic environment.
  • Communicate effectively with multiple design teams of RF, Analog, Digital IC designers, and Test engineers.
  • Bachelor’s Degree with 5 years of experience, master’s degree with 3 years of experience, Ph.D. with 1 years of experience in Science, Technology, Engineering, Mathematics or related technical fields; an additional 4 years of experience may be considered in lieu of a degree.
  • U.S Citizenship is required.
  • Ability to obtain and maintain a DoD Secret clearance prior to starting.
  • 5 years of experience with Virtuoso Schematic, Specter/ADE simulation tools from Cadence, RTL language.
  • 5 years of experience with Verilog, Verilog AMS, System Verilog and/or VHDL.
  • Capable of developing models from Analog/Mixed Signal/RF circuit block diagrams and transistor level schematic by inspection.
  • A current or active DoD Secret clearance.
  • Experience with Analog, RF, or Digital IC design at the transistor level.
  • Health Plan
  • Savings Plan
  • Paid Time Off
  • Education Assistance
  • Training and Development
  • 9/80 Work Schedule (where available)
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service