Principal RTL Design Engineer - QGOV

Qualcomm • San Diego, CA

69d • $192,000 - $288,000

About The Position

As a Design Engineer, you’ll play a critical role in shaping cutting-edge digital designs. Your responsibilities will include: Micro-Architecture: Designing micro-architecture for both simple and complex digital, interface blocks. RTL Development: Developing RTL (Register Transfer Level) code using industry best practices. This includes handling multi-clock designs, high-frequency requirements, low power, and low latency considerations while ensuring high performance. Debugging and Post-Silicon Bring-Up: Troubleshooting and debugging issues during the development process and supporting post-silicon bring-up activities. Documentation: Creating comprehensive design documentation to ensure clarity and maintainability. Design Optimization: Optimizing designs for key metrics such as area, power, and performance. Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT (Design for Testability), Implementation, Verification, Emulation, and Firmware teams.

Requirements

• 10+ years of work experience with RTL/FPGA design (Verilog, System Verilog), embedded system architecture and Verification
• Bachelor's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 10+ years of Hardware Engineering or related work experience
• OR Master's degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 10+ years of Hardware Engineering or related work experience
• OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field

Nice To Haves

• Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems
• 10+ years of ASIC design experience
• System Verilog Design, Linting, CDC, Synthesis (FPGA and ASIC)
• Building the test suites for design validation
• Understanding of Emulation and prototyping flows for design and validation in Lab
• Experience with designing complex digital logic blocks and sub systems (CPU, GPU, DSP, Always on Systems, Digital interfaces)
• Knowledge of ISAs (Instruction Set Architectures) such as ARM THUMB or RISC-V
• Understanding of processor or microcontroller system design
• Experience with designs spanning multiple power domains and clock domains
• Proficiency in scripting or automation languages like Python or Perl
• Familiarity with state-of-the-art industry-standard digital design tools
• Awareness of challenges faced when working with lower node technologies

Responsibilities

• Designing micro-architecture for digital interface blocks
• Developing RTL code using industry best practices
• Handling multi-clock designs and high-frequency requirements
• Troubleshooting and debugging during development
• Supporting post-silicon bring-up activities
• Creating comprehensive design documentation
• Optimizing designs for area, power, and performance
• Collaborating with cross-functional teams

Benefits

• Competitive annual discretionary bonus program
• Opportunity for annual RSU grants
• Comprehensive benefits package designed to support success at work, at home, and at play

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: Master's degree
• Number of Employees: 5,001-10,000 employees