Principal RFIC Design Engineer

Western Digital • San Jose, CA

5d

About The Position

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that—our technology helped people put a man on the moon and capture the first-ever picture of a black hole. We offer an expansive portfolio of technologies, HDDs, and platforms for business, creative professionals, and consumers alike under our Western Digital®, WD®, WD_BLACK™, and SanDisk® Professional brands. We are a key partner to some of the largest and highest-growth organizations in the world. From enabling systems to make cities safer and more connected, to powering the data centers behind many of the world’s biggest companies and hyperscale cloud providers, to meeting the massive and ever-growing data storage needs of the AI era, Western Digital is fueling a brighter, smarter future. Today’s exceptional challenges require your unique skills. Together, we can build the future of data storage.

Requirements

• Must have hands-on design and development experience in RF and analog integrated circuit
• Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Baseband amplifiers, low noise RF amplifiers, wide bandwidth amplifiers Mixers, up-converters, down-converters High speed drivers and receivers, CDR circuits, equalizers Power amplifiers
• Must have experience in 40nm and below CMOS technology
• Must have a demonstrable track record of successful design releases and mass production
• Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.)
• Experience with RF and high performance analog block layout such as LNA, mixer, analog to digital converters, references, digital to analog converters etc.
• Experience with floor planning, block level routing and top level chip routing
• Knowledge of high performance analog layout considerations such as matching, EM-IR and SOA and mitigation techniques
• Must possess strong written and verbal communication skills
• BSEE with 10+ years of experience
• MSEE with 8+ years of experience
• PhD with 4+ years of experience

Nice To Haves

• Experience working with distributed design teams a plus

Responsibilities

• Designer will be responsible for the design of high performance RF and analog circuit blocks.
• Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation.
• Job responsibilities require ability to communicate at all levels and with cross functional groups.

Benefits

• We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Education Level: Ph.D. or professional degree
• Number of Employees: 5,001-10,000 employees