Principal Power and Performance Architect

NVIDIA•Us, CA

13h•Hybrid

About The Position

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics, and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology and amazing people. We are seeking a Senior Power and Performance Architect to influence, innovate and drive next generation power management and power features to market. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers a unique opportunity to collaborate with multiple organizations in the company and grow your career in a high-impact role. We need a passionate, hard-working, and creative individual to lead the power features all the way from architecture to delivering the features on the final product. What you'll be doing: Architect next generation power management features and solutions, through system architecture, design, and productization; working with multi-functional teams across the company. Evaluate industry direction and use cases; identify opportunities and challenges in the area of power management and optimization to drive the future roadmap to build competitive products. Drive initiatives for system-level power optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from large-scale datacenters to low-power client devices. Lead the team for power feature requirements and schedule from architecture to silicon phase of projects, incorporating silicon feedback to improve the next generation. Develop methodologies for power modeling and measurement, characterization of power features, correlate silicon behavior with simulations, and provide design feedback. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, sales, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market.

Requirements

MS or PhD in EE, CE, CS, Systems Engineering or equivalent experience.
Proven experience of 15+ years in the area of silicon and product power and power management.
Expertise and deep understanding in the areas of silicon power, transistor/device physics, power modeling and measurement, active power management.
Background with system level features, product binning methods, optimization techniques, methods and tools for data analysis and statistics.
Experience working on product level power and performance analysis and optimization.
Familiarity with silicon bringup and validation, frequency and power characterization; hands-on post silicon experience is a plus.
Excellent problem solving, partnership, and interpersonal skills.
Experience working with offshore teams is required.
Exposure to CPU/GPU/SoC architecture and HW-SW co-design is a plus.

Nice To Haves

Background with the market segments of datacenter is preferred.
Familiarity with silicon bringup and validation, frequency and power characterization; hands-on post silicon experience is a plus.
Exposure to CPU/GPU/SoC architecture and HW-SW co-design is a plus.

Responsibilities

Architect next generation power management features and solutions, through system architecture, design, and productization; working with multi-functional teams across the company.
Evaluate industry direction and use cases; identify opportunities and challenges in the area of power management and optimization to drive the future roadmap to build competitive products.
Drive initiatives for system-level power optimizations spanning across silicon, platform, software, manufacturing, and product systems; for products ranging from large-scale datacenters to low-power client devices.
Lead the team for power feature requirements and schedule from architecture to silicon phase of projects, incorporating silicon feedback to improve the next generation.
Develop methodologies for power modeling and measurement, characterization of power features, correlate silicon behavior with simulations, and provide design feedback.
Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/SW applications engineering, process/reliability authorities, ATE engineers, sales, and silicon operations, in a fast-paced, high-energy, collaborative work environment to bring industry-defining products to market.