Principal FPGA / Microchip Engineer

Full Spectrum • Westborough, MA

1d • $85 - $135

About The Position

Full Spectrum partners with leading companies in MedTech to develop cutting-edge medical devices. With projects focused on embedded systems, mobile apps, and robotics, engineers at Full Spectrum love the challenge of working with clients on products that have a meaningful impact. A role at Full Spectrum will allow you to be at the cutting edge of engineering driven innovation. If it excites you to develop new products and learn new technologies on a regular basis from a diverse set of customers, then this is the place for you.

Principal FPGA / Microchip Engineer

Full Spectrum is seeking a talented and motivated Principal FPGA / Microchip Engineer. This position sits at the intersection of hardware architecture and software abstraction. The ideal candidate will have a commitment to high-quality design, be a self-starter, and have good attention to detail. This candidate must have the ability to work well both independently and in team settings.

Requirements

• ·8-10+ years of FPGA design, preferably in consulting or fast-paced product environment
• ·VHDL/Verilog proficiency for designing digital circuits
• ·Experience designing solutions with Microchip’s FPGA families (PolarFire, IGLOO2, SmartFusion2, etc.), and developing and optimizing RTL specifically for Microchip architectures
• ·Strong understanding of the Microchip fabric architecture, LUTs, flip-flops, DSP blocks, routing matrix, and power management features (e.g, PolarFire’s low-power capabilities)
• ·Experience working with Microchip Libero SoC IDE toolchain, including
• ·SmartDesign for IP integration and system-level design,
• ·SmartDebug and Synopsys Identify for on-chip hardware debugging,
• ·SmartTime for static timing analysis and resolution of CDC issues,
• ·ModelSim for simulation, and Synplify Pro for synthesis
• ·Strong understanding of finite state machines, FIFO, combinational and sequential logic design, timing analysis and clock domain crossing, pipelining and parallelism
• ·Experience designing for and integrating low-speed (e.g., I2C, SPI, UART, CAN bus) and high-speed (e.g., PCIe, Ethernet) interfaces
• ·Practical experience with ARM-based SoC architectures
• ·Proficiency in Python for automating build flows, building object-oriented verification components (e.g., cocotb), and/or for data manipulation (e.g., using NumPy, pandas) for algorithmic validation
• ·Experience working with medical device development standards such as IEC 62304, IEC 60601
• ·Expert-level use of oscilloscopes, spectrum analyzers, and logic analyzers for hardware bring-up and root-cause failure analysis
• ·Experience working with Quality and Regulatory teams to provide input for Risk Analysis per ISO 14971
• ·Proven track record of executing tasks to a project schedule while managing scope creep and technical debt
• ·Ability to explain complex technical trade-offs to non-technical client stakeholders

Nice To Haves

• Experience with SystemVerilog
• Embedded C/C++ programming experience including low-level driers or firmware to interact with the FPGA logic
• Experience in hardware-software co-design to architect high-performance data paths that partition tasks between the microcontroller subsystem and the FPGA
• Development and maintenance of CI/CD pipelines

Responsibilities

• Architecture and Design: define and implement high-performance digital logic architectures using VHDL or Verilog/SystemVerilog for medical device systems, specifically for Microchip PolarFire, SmartFusion2, and/or IGLOO2 architectures
• RTL Development: develop clean, synthesizable RTL for safety-critical medical devices, with focus on fault-tolerant design, SEU immunity, and deterministic timing
• System-Level Integration: utilize SmartDesign to architect complex SoC
• Verification & Simulation: create comprehensive testbenches to validate logic. Leverage Python-based co-simulation to validate RTL against algorithmic models using NumPy/SciPy
• Formal Verification: Implement rigorous hardware-in-the-loop (HIL) testing and formal verification to ensure 100% coverage for critical functions, ensuring strict adherence to IEC 62304 software lifecycle standards
• Timing Closure and Power Optimization: analyze and resolve complex timing violations, clock domain crossing (CDC) issues, and power consumption constraints
• Hardware Integration: collaborate with PCB designers to define and integrate low- and high-speed interfaces
• On-chip Debugging and Bring-up: perform real-time hardware debugging using SmartDebug, Synopsys Identify, and traditional lab equipment (logic analyzers, oscilloscopes) to troubleshoot board-level issues
• Risk-based Lifecyle Management: Participate in FMEA (Failure Modes and Effects Analysis) to identify potential failure points and implement mitigation logic, maintaining traceability of RTL logic to safety requirements; maintain documentation for register maps, interface specs, and version control for gate-level netlists
• Stakeholder Communication and Project Execution: Execute tasks to strict project schedules while managing technical debt. Effectively communicate complex hardware/software trade-offs to non-technical client stakeholders

What This Job Offers

• Career Level: Principal
• Education Level: No Education Listed