Principal FPGA Engineer

Radiant Industries•El Segundo, CA

7d•Onsite

About The Position

Radiant is seeking a Principal FPGA Engineer to serve as the technical authority for FPGA development across our Embedded Systems team. You will define the architecture, methodology, and standards governing FPGA design for a safety-critical instrumentation and control system responsible for real-time reactor control, sensor and actuator handling, and communications. This role operates at the intersection of deep technical ownership and organizational influence, shaping how Radiant approaches FPGA development as we bring the first commercial microreactor to market.

Requirements

Bachelor's degree in computer engineering, electrical engineering, or related field; advanced degree preferred.
10+ years of progressive FPGA development experience with demonstrated impact at a principal or staff engineer level.
Expert-level proficiency in VHDL, SystemVerilog, or equivalent HDL, with a track record of setting team-wide design standards.
Mastery of full-cycle FPGA development — RTL architecture, simulation, synthesis, timing closure, and hardware bring-up — across multiple platform generations.
Deep experience with multi-clock domain design, fault-tolerant architectures, and safety-critical systems.

Nice To Haves

Experience in regulated development environments, including aerospace, defense, and manufacturing.
Experience with the Microchip PolarFire SoC platform or comparable ecosystems.
Proficiency with embedded C/C++ in FPGA/SoC contexts.
Experience with formal or coverage-driven verification methodologies at scale.
Familiarity with CI/CD pipelines applied to HDL workflows.

Responsibilities

Define and own the overall FPGA architecture strategy across Radiant's instrumentation and control systems, ensuring designs scale with evolving product and regulatory requirements.
Establish org-wide FPGA development standards, toolchain selections, and verification methodologies.
Drive the most complex technical challenges — timing closure at scale, fault-tolerant design, multi-domain clock architectures — and set the precedent for how they are solved.
Serve as the primary technical interface across Embedded Systems, hardware, software, and systems engineering, ensuring cohesive system-level design decisions.
Lead architecture and design reviews, setting the quality bar for RTL, simulation, synthesis, and validation deliverables.
Partner with engineering leadership to define hiring criteria and inform technical roadmap decisions.
Mentor senior and mid-level FPGA engineers, building long-term technical depth across the organization.

Benefits

Stock: Substantial incentive stock plan for all full-time employees.
Medical: 100% up to base silver level plan for employee + 50% dependents, offers up to Platinum plans.
One Medical: Sponsored memberships for employees and their dependents.
Vision: 100% top tier plan coverage + 50% for dependents.
Dental: 100% top tier plan coverage, orthodontia extra, 50% for dependents.
Voluntary life, accident, hospital, critical illness, commuter and FSA/HSA are offered as employee contributed benefits.
8-weeks of paid parental leave for all parents. Additional paid pregnancy leave for CA employees.
Daily catered lunch. Free snacks and drinks.
Flexible PTO policy. Remote workday allocation.
Company and team-bonding events, happy hours and in-person camaraderie.
Beautiful El Segundo headquarters close to the Pacific Ocean.