Principal Engineer – Scale Out Networking & Systems Architecture

Qualcomm•San Diego, CA

About The Position

Qualcomm is seeking a Principal Engineer to serve as the technical authority for scale‑out networking in next‑generation AI accelerator platforms. This role owns the architecture, implementation, and partner alignment of multi‑server scale‑out systems, spanning NICs, firmware, Linux kernel drivers, user‑space libraries, and runtime integration. Unlike traditional NIC‑centric roles, this position focuses on end‑to‑end scale‑out system design, including RoCE‑based transports, UAL, and ESUN, with responsibility across hardware, firmware, and host software layers.

Requirements

BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or equivalent experience
10–15+ years experience in system software, networking, or platform engineering
Proven experience building scale‑out server or cluster architectures
Strong hands‑on experience with: Linux kernel networking and drivers RDMA / RoCE stacks (kernel and user space) Firmware‑software interfaces
Excellent systems‑level debugging skills across HW/FW/OS boundaries
Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 8+ years of Software Engineering or related work experience.
4+ years of work experience with Programming Language such as C, C++, Java, Python, etc.

Nice To Haves

Hands‑on experience with: libibverbs, RDMA core, RoCE drivers, and firmware UAL, ESUN, or similar transport/runtime abstractions
Background in AI, HPC, or accelerator‑based platforms
Experience enabling multi‑server inference or disaggregated serving
Strong C/C++ systems programming background (x86 and ARM64)

Responsibilities

Act as principal technical owner for multi‑server scale‑out networking architecture
Define and evolve RoCE‑based RDMA data paths for AI inference and distributed workloads
Drive system‑level tradeoffs across: NICs and switches PCIe and DMA paths Firmware, Linux kernel drivers, and user‑space libraries
Architect and review: RoCE / RDMA kernel drivers Firmware interfaces enabling peer‑to‑peer and zero‑copy transfers User‑space transport abstractions (e.g., UAL, ESUN)
Debug and optimize performance across: Firmware → driver → user space Latency, congestion, ordering, and buffer management
Influence upstream or ecosystem‑level designs where appropriate
Serve as Qualcomm’s principal technical interface with: NIC vendors and switch vendors Silicon and platform partners
Lead deep technical design‑ins, architecture reviews, and production escalations
Translate partner and field learnings into platform and firmware roadmaps
Drive complex cross‑org efforts from concept to production enablement
Identify architectural risks early and lead mitigation
Mentor senior engineers through design and architecture reviews