Principal Engineer, Platform Systems Architect

Ayar Labs•San Jose, CA

26d•$180,000 - $240,000•Onsite

About The Position

The successful candidate will collaborate with customers and interface with internal teams (laser, mixed-signal silicon, photonics, packaging) to design AI rack platforms using Ayar Labs' CPO silicon photonics optical engines and ELSFP modules. The candidate will translate customer system requirements into AI rack physical specifications. The candidate will collaborate with design teams to ensure spec compliance. The candidate will represent Ayar Labs at standard setting organizations (SSOs) and promote Ayar Labs' optical interconnect technology. The candidate will collaborate with the CTO office on pathfinding activities, and product and technology roadmaps. At Ayar Labs we're about to revolutionize computing by moving data with light. We're unleashing processing power for artificial intelligence, high performance computing, cloud and telecommunications by removing the bottlenecks created by today's electrical I/O -- making it possible to continue scaling computing system performance. Ayar Labs is the first to deliver an optical I/O solution that combines in-package optical I/O chiplets and multi-wavelength remote light sources to replace traditional electrical I/O. This silicon photonics-based I/O solution enables chips to communicate with each other from millimeters to kilometers, to deliver orders of magnitude improvements in latency, bandwidth density, and power consumption. With our strong collaborations with industry leaders and government, our deep ties to MIT and UC Berkeley, and our commitment to hiring the best engineers in photonics and electronics, joining our team gives you the opportunity to collaborate with renowned experts on challenging, paradigm-shifting work. We are passionate about delivering in-package optical I/O at scale, leveraging the strength of our patent portfolio and our team of leading interdisciplinary experts. We believe that deep cross-collaboration between teams facilitated by honest, open debate is the best way to drive innovation and achieve big wins. Join our team and experience the possibilities.

Requirements

MS degree in Mechanical or Electrical Engineering or equivalent
10+ years of industry experience
5+ years of experience in AI/ML, HPC and networking platforms
AI or HPC compute chassis and rack design experience
Experience with thermal analysis, air-cooled or liquid cooling solutions, interconnect cabling, fiber management, rack physical design, chip packaging, power delivery, signal integrity
Understanding of OAM, OSFP/QSFP, and PCIe cards and connector specifications
Understanding of NRZ, PAM4, and coherent modulations
Understanding of D2D and SerDes links
Familiar with relevant standard setting standards
Experience with AutoCAD, Shapr3D, or similar

Nice To Haves

Ph.D
Optical interconnect experience

Responsibilities

Use Ayar Labs' in-package optical I/O as the foundational technology, work with customers to design AI rack platforms for scale-up and scale-out fabrics and extended memory.
Formulate AI rack platform specifications based on customer system requirements and collaborate with design teams to ensure spec compliance for the rack systems.
Work on pathfinding activities and advanced product & technology roadmaps.
Participate on SSOs such as OpenCompute, UEC, ESUN, Ultra Accelerator Link, OIF, and IEEE 802.3.
Participate in technology evangelization through customer presentations, conference papers, seminar/webinars.

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