Principal Engineer - Digital Design

Microchip Technology Inc. • Chandler, AZ

182d

About The Position

Microchip's NCS Team is seeking an experienced Design engineer to support PHY (Physical Layer) development for our next generation of USB products. The role will include working with analog and digital engineers to create mixed-signal IPs and SoC products. As a Principal Digital Design Engineer, the candidate shall be working with multi-sited global Silicon Development Team in the areas of RTL design, design verification, synthesis, STA, and Test using an industry leading ASIC design flow. Candidate must be in the Chandler design center.

Requirements

• 9 to 12 years or more experience in digital design.
• Hands-on experience in RTL Coding and functional verification.
• Experience in USB and Ethernet PHY protocols.
• Knowledge and experience in Verilog/System Verilog design and test bench creation.
• Excellent debug skills in both functional and gate level simulations.
• Experience with Verification methodologies such as UVM/VMM.
• Experience in ASIC design flow including lint checking, Crossing Clock domain checking, DFT methodology, equivalence checking and synthesis.
• Hands-on experience with Mentor and Synopsys CAD tools such as Questa, Design Compiler, Formality and Spyglass.
• Knowledge in synthesis for defining timing constraints.
• Ability to solve timing constraint challenges.
• Knowledge of ASIC test methodology such as Stuck-At/At-Speed scan insertion.
• Proficiency in a scripting language such as C, TCL, Perl, Awk, UNIX shell.
• Knowledge of revision control tools such as CVS, Perforce, DesignSync.

Nice To Haves

• Experience with tagging and release methodology.
• Good verbal and written communication skills.
• Ability to work as part of a digital, analog, and DSP design team.

Responsibilities

• Support PHY development for next generation USB products.
• Work with analog and digital engineers to create mixed-signal IPs and SoC products.
• Engage in RTL design, design verification, synthesis, STA, and Test.
• Collaborate with global Silicon Development Team.
• Provide design documentation, description, and information to internal customers.
• Support chip-level integration, verification, and validation teams.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Number of Employees: 5,001-10,000 employees