Principal ASIC Engineer (San Diego, CA)

Synchron • San Diego, CA

12h • $175,000 - $225,000 • Onsite

About The Position

Synchron is seeking an experienced Principal ASIC Engineer to own the architecture, specification, and delivery of our high-performance neural interface ASIC. You’ll work closely with our internal hardware and neuroscience teams while driving external ASIC vendors and design partners through all development phases — from early concept through production silicon.
This is a technical leadership role with high impact and broad scope. You’ll set design direction, ensure system alignment, and drive key decisions that balance performance, power, and scalability.

Requirements

• M.S. or Ph.D. in Electrical or Computer Engineering, or a related field.
• 5-10+ years of experience in ASIC/SoC design and development, with at least one full ASIC development cycle from concept to silicon.
• Deep expertise in HDL (Hardware Description Languages) such as Verilog/VHDL and HVL (Hardware Verification Languages) like SystemVerilog.
• Proficiency with Electronic Design Automation (EDA) tools (e.g., Synopsys, Cadence, Mentor Graphics) for simulation, synthesis, and timing analysis.
• Strong knowledge of design principles including clock domain crossing (CDC), low-power design techniques, and Design for Testability (DFT).
• Demonstrated ability to architect and optimize ASICs for ultra-low-power operation, including sub-µW/channel front-ends, low-leakage circuits, and efficient power domains.
• Experience designing for microvolt-level biopotential signals with excellent linearity, dynamic range, and noise performance.
• Understanding of circuit and layout techniques to achieve high electrical isolation and minimize crosstalk across thousands of parallel acquisition channels.
• Hands-on experience analyzing and mitigating coupling, ground bounce, and substrate noise in dense mixed-signal designs.
• Ability to work across analog, digital, and packaging boundaries to ensure signal fidelity from sensor to system output.
• Experience with scripting languages (Python, Perl, Tcl) for automation.
• Exceptional problem-solving, analytical, and data-driven decision-making skills.
• Strong leadership and communication skills, with the ability to articulate complex technical concepts to diverse audiences.
• Ability to work effectively in cross-functional, often global, teams.

Responsibilities

• Architecture & Specifications:Define long-term ASIC architecture and top-level specifications for high-density neural signal acquisition and processing. Set design standards for ASICs that may affect multiple product lines.
• Technical Leadership:Provide technical leadership and accountability for multiple project teams, guiding them through complex design and verification challenges.
• Implementation & Verification:Oversee the entire design flow from RTL (Register-Transfer Level) implementation (using Verilog/SystemVerilog) through synthesis, timing analysis, and verification closure using methodologies like UVM (Universal Verification Methodology).
• Cross-functional Collaboration:Work closely with system architects, physical design, software, firmware, and validation teams to ensure seamless integration and system-level performance.
• Problem Solving & Debugging:Act as the escalation point for high-risk technical issues, conducting root cause analysis and implementing corrective actions during pre-silicon and post-silicon validation and debug.
• Mentoring & Process Improvement:Mentor senior and staff engineers, conduct design reviews, and recommend new tools and practices for continuous improvement in the ASIC design flow.
• Vendor & Project Management:Assist in interfacing with external ASIC vendors, managing project schedules and milestones, and balancing resource trade-offs across projects.

Benefits

• Subsidized medical and dental insurance coverage for you and your dependent(s)
• Life insurance, short-term disability, long-term disability
• 401k
• Discretionary unlimited PTO
• Flexible Spending Account for you and your dependent(s), with eligible plan elections
• Commuter benefits for NY employees

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Number of Employees: 101-250 employees