Principal Analog/Mixed-Signal IC Design Engineer

Western Digital•San Jose, CA

11h

About The Position

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that—our technology helped people put a man on the moon and capture the first-ever picture of a black hole. We offer an expansive portfolio of technologies, HDDs, and platforms for business, creative professionals, and consumers alike under our Western Digital®, WD®, WD_BLACK™, and SanDisk® Professional brands. We are a key partner to some of the largest and highest-growth organizations in the world. From enabling systems to make cities safer and more connected, to powering the data centers behind many of the world’s biggest companies and hyperscale cloud providers, to meeting the massive and ever-growing data storage needs of the AI era, Western Digital is fueling a brighter, smarter future. Today’s exceptional challenges require your unique skills. Together, we can build the future of data storage.

Requirements

Must have hands-on design and development experience in analog and mixed-signal integrated circuit
Must have experience in at least one preferably multiple area of full CMOS circuit design and development in: Amplifiers – operational, instrumentation, wide-bandwidth etc. PMIC – Linear and switched regulators, Low-drop out regulators etc. Data converters – ADC, DAC, Flash and SAR type
Must have experience in 40nm and below CMOS technology
Must have a demonstrable track record of successful design releases and mass production
Must have thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.)
Experience with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization
Experience with floor planning, block level routing and top level chip routing
Knowledge of high performance and deep CMOS analog reliability considerations such as EM-IR, SOA and VDR and relevant mitigation techniques
Functional knowledge of logic digital circuits and understanding of basic digital design flow
Must possess strong written and verbal communication skills
BSEE with 10+ years of experience
MSEE with 8+ years of experience
PhD with 4+ years of experience

Nice To Haves

Experience working with distributed design teams a plus
Candidate must have good verbal and written communications skills and demonstrated track record of circuit innovation, must be a team player, be adaptable, and accept criticism.

Responsibilities

Designer will be responsible for the design of high performance analog and mixed-signal circuit blocks.
Responsibilities include transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation.
Job responsibilities require ability to communicate at all levels and with cross functional groups.

Benefits

We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program; employee stock purchase plan; and the Western Digital Savings 401(k) Plan.

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