Pre - Silicon Verification Technical Lead Engineer

AMD-posted 8 months ago
Full-time
San Jose, CA
Computer and Electronic Product Manufacturing
Resume
Match Score
Upload and Match ResumeTrack Jobs with Teal

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: Adaptive and Embedded Computing Group (AECG) seeks a Pre-Silicon Verification Engineer to provide technical leadership and expertise in the verification of high-speed Crypto, Network-on-Chip (NoC), and cutting-edge DRAM Memory Controller IPs (LPDDR6, HBM4). You will be responsible for architecting, developing, and utilizing simulation and/or formal-based verification environments at both block and SoC-level to achieve first-pass silicon success.

  • Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance.
  • Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level.
  • Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs.
  • Develop and execute comprehensive verification plans, including testbenches and test cases.
  • Collaborate with design, architecture, and software teams to define and implement verification strategies.
  • Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification.
  • Mentor and guide junior engineers, fostering a collaborative and innovative team environment.
  • Proven track record in driving strategies and successfully executing verification strategies for Pre-Silicon Design IP and/or SOC designs.
  • Strong team players with excellent communication and leadership skills.
  • Experience with development of UVM and System Verilog test benches and usage of simulation tools/debug environments such as Synopsys VCS or Cadence Xcelium.
  • Strong understanding of state of the art of verification techniques, including assertion and metric-driven verification.
  • Familiarity with verification management tools and understanding of database management particularly as it pertains to regression management.
  • Experience with formal property checking tools such as VC Formal (Synopsys), JasperGold (Cadence), and Questa Formal (Mentor) is a plus.
  • Experience with gate-level simulation, power-aware verification is a plus.
  • Experience with silicon debug at the tester and board level is a plus.
  • BS or MS or PhD in Electrical Engineering, Computer Engineering or Computer Science.
  • Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high-performance IP and/or VLSI designs.
  • AMD benefits at a glance.
Track Jobs with Teal

Job Search Resources

•
Resume Builder
•
Resume Examples
•
Cover Letter Examples

Tools

Career Hubs

Guides

Company

© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service