Power Modeling Engineer

Apple • Cupertino, CA

98d • $147,400 - $220,900

About The Position

As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You will be part of the team responsible for designing state-of-the-art ASICs that are integral to many Apple products. We are looking for an engineer who will work on the modeling of power dissipation of various IPs including AI/ML and the corresponding power rails, peak current requirements and voltage-frequency operating points for upcoming generations of Apple SOCs. Imagine yourself collaborating across many fields, playing a decisive role of getting innovative products to millions of customers! You will have the opportunity to build new insights into silicon optimization, as well as work with a team of hardworking engineers and be involved in HW/model correlation efforts of mobile SoC design.

Requirements

• Master's degree in Electrical and Computer Engineering.
• 2+ years of relevant industry experience.
• Experience with lower power design techniques for power consumption optimization.
• Develop test plans at the SoC level.
• RTL design experience.
• Programming experience with Python and Perl.

Nice To Haves

• Understanding of electrical properties of on-die PDN, power gating, package and system power delivery.
• Skills in scripting, data analysis and experience with EDA tools.
• Understanding of VLSI design flow and CMOS technology.
• Extensive background in EE.
• Ability to understand and model thermal control loops and throttling mechanisms.
• Familiarity with physical design tools for power optimization.
• Great teammate and excellent communication skills.

Responsibilities

• Develop IP power models on new architecture designs.
• Provide power data for performance, power, and area trade-offs.
• Collaborate with architects to simulate and resolve use-cases.
• Provide power projections for future projects based on analysis.
• Create test cases within the design verification team's environment.
• Determine the correct functionality or enhancement functionality for power reduction in collaboration with logic teams.
• Model the Systems on a Chip (SOC) power for use cases.
• Improve power modeling.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• A range of discounted products and free services.
• Reimbursement for certain educational expenses — including tuition.
• Discretionary bonuses or commission payments.
• Relocation assistance.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Industry: Computer and Electronic Product Manufacturing
• Education Level: Master's degree