Power Integrity Engineer

Apple Inc.•Austin, TX

42d

About The Position

The Mac organization is seeking a skilled and experienced Power Integrity Engineer to contribute to the development of Mac, Data Center, and Accessory products. This role focuses on the system-level Power Distribution Network (PDN) design, analysis, and validation, requiring a deep understanding of power supply architectures, PDN modeling, PCB design practices, and electromagnetic simulation tools. The engineer will collaborate with multi-functional teams to implement power supply network solutions, develop and validate impedance and droop targets, and verify power supply quality through lab and in-situ silicon measurements. As a Power Integrity Engineer for Data Center and Mac platforms, you will lead the design, simulation, and validation of power delivery networks (PDNs) for next-generation server and The Power Integrity Engineer will be responsible for pathfinding studies during silicon development, providing feedback to silicon and packaging teams on system integration trade-offs. This includes performing target impedance analysis, transient voltage droop, and phase margin/stability analysis. The candidate will work closely with System Design teams to provide detailed layout strategies and guidelines during design execution and collaborate with HW Validation teams to develop test suites for system-level validation, evaluating design margins on power domains. The role provides PI support throughout the project design process, from system pathfinding and verification to characterization reviews, with continuing guidance through production and ramp. Experience with CPM (Chip-Power-Model) usage for system transient analysis. Understanding of die-package-board power delivery network co-design constraints and tradeoffs. PCB and PKG layout skill.

Requirements

MATLAB experience
Excellent documentation and communication skills
Proven ability to work independently, mentor others, and innovate
Demonstrated experience in driving initiatives that improved process, procedures, and result quality

Nice To Haves

Experience with CPM (Chip-Power-Model) usage for system transient analysis
Understanding of die-package-board power delivery network co-design constraints and tradeoffs
PCB and PKG layout skill
Experience with Perl, Python, or other scripting languages

Responsibilities

design
simulation
validation of power delivery networks (PDNs) for next-generation server
pathfinding studies during silicon development
target impedance analysis
transient voltage droop
phase margin/stability analysis
provide detailed layout strategies and guidelines during design execution
develop test suites for system-level validation
evaluating design margins on power domains
PI support throughout the project design process, from system pathfinding and verification to characterization reviews, with continuing guidance through production and ramp