PLL Design Engineer

AppleSunnyvale, CA
12d

About The Position

As a mmWave Design Engineer at Apple, you will utilize your vast background in circuit design and be responsible for providing mmW design solutions for wireless chips. Responsibilities include collaborating with platform architects, system engineers, and digital design groups to define the requirements for mmWave phased-array front-end and baseband blocks based on the product requirements. Working with the technology team and foundries on process evaluation/selection for the target device. Designing various transceiver blocks in TX, RX, and LO chains. Partnering with the design, layout, and chip integration teams to integrate the IP’s and verify the top-level functionality and performance. Working with mmWave test engineers to bring up and characterize chips.

Requirements

  • BS and 3+ years of relevant industry experience required
  • Solid understanding of RF and analog circuit design fundamentals
  • Experience with circuit simulation tools (Cadence, ADS, or similar) and design methodologies for high-frequency circuits

Nice To Haves

  • experience with mmWave, RF, and analog integrated circuit design with some experience in mmWave CMOS or SiGe circuit design
  • Deep understanding of system specifications and the ability to work with system architects to translate system requirements into circuit requirements at an IC level
  • Familiarity with various RF transceiver architectures and their trade-offs
  • Extensive experience in the simulation and design of lumped and distributed passive structures, such as CPW lines, coupled lines, inductors, and capacitors
  • Proven experience in analysis, design, and implementation of mmWave low-noise, broadband, and/or high-power amplifiers, as well as mixers and oscillators
  • Understanding of mmWave device modeling; insights into packaging effects, integrated antenna arrays, supply isolations, high-frequency ESD structures, and circuit layout for optimum performance
  • Hands-on experience in high-frequency silicon characterization and debug would be helpful

Responsibilities

  • collaborating with platform architects, system engineers, and digital design groups to define the requirements for mmWave phased-array front-end and baseband blocks based on the product requirements
  • Working with the technology team and foundries on process evaluation/selection for the target device
  • Designing various transceiver blocks in TX, RX, and LO chains
  • Partnering with the design, layout, and chip integration teams to integrate the IP’s and verify the top-level functionality and performance
  • Working with mmWave test engineers to bring up and characterize chips
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