UST-posted about 2 months ago
$81,000 - $122,000/Yr
Full-time • Mid Level
Redmond, WA
5,001-10,000 employees

Platform C Modelling Development Engineer Lead I - Semiconductor S/W Product Development Who We Are: Born digital, UST transforms lives through the power of technology. We walk alongside our clients and partners, embedding innovation and agility into everything they do. We help them create transformative experiences and human-centered solutions for a better world. UST is a mission-driven group of 29,000+ practical problem solvers and creative thinkers in more than 30 countries. Our entrepreneurial teams are empowered to innovate, act nimbly, and create a lasting and sustainable impact for our clients, their customers, and the communities in which we live. With us, you'll create a boundless impact that transforms your career—and the lives of people across the world. You Are: The SystemC Modeling Engineer will be responsible for developing and maintaining high-fidelity system-level models using SystemC for hardware/software co-design and verification. This role is crucial for enabling early performance analysis, architecture exploration, and functional validation of complex embedded systems. The engineer will work closely with architecture, design, and verification teams to ensure the accuracy and efficiency of the SystemC models. The opportunity: · Develop and maintain accurate and efficient SystemC models of platform components, including processors, memory controllers, and peripherals. · Implement TLM-based interfaces for communication between SystemC models and other simulation environments. · Validate the accuracy of SystemC models through comparison with RTL simulations and hardware prototypes, achieving a model fidelity target of X% (define target). · Collaborate with architecture and design teams to define modeling requirements and ensure models accurately reflect system specifications. · Contribute to the development of SystemC modeling guidelines and best practices within the organization. · Create and maintain documentation for SystemC models, including model descriptions, usage examples, and validation reports. This position description identifies the responsibilities and tasks typically associated with the performance of the position. Other relevant essential functions may be required.

  • Develop and maintain accurate and efficient SystemC models of platform components, including processors, memory controllers, and peripherals.
  • Implement TLM-based interfaces for communication between SystemC models and other simulation environments.
  • Validate the accuracy of SystemC models through comparison with RTL simulations and hardware prototypes, achieving a model fidelity target of X% (define target).
  • Collaborate with architecture and design teams to define modeling requirements and ensure models accurately reflect system specifications.
  • Contribute to the development of SystemC modeling guidelines and best practices within the organization.
  • Create and maintain documentation for SystemC models, including model descriptions, usage examples, and validation reports.
  • Experience with Board bring-up, platform initialization, board support package development, peripherals such as PCIe, I2C, SPI, USB, UART , OS primitives, memory management, scheduling, interrupts, and multi-threading.
  • Good experience in system level debugging with comprehensive understanding of managing and prioritizing system level issues.
  • Extensive background in firmware development or embedded software development within a multicore environment or hardware context.
  • Bachelor's degree in electrical engineering, Computer Engineering, or a related field. Master's degree preferred.
  • 5+ years of experience in SystemC modeling and simulation of embedded systems.
  • Strong understanding of computer architecture principles and hardware/software co-design methodologies.
  • Proven experience in developing and debugging SystemC models using industry-standard simulation tools.
  • Excellent C++ programming skills and familiarity with object-oriented design principles.
  • Experience using Git for version control.
  • Experience with TLM (Transaction Level Modeling) is highly desirable.
  • Familiarity with hardware description languages (VHDL or Verilog) is a plus.
  • Full-time, regular employees accrue a minimum of 10 days of paid vacation per year, receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year), 10 paid holidays, and are eligible for paid bereavement leave and jury duty.
  • They are eligible to participate in the Company's 401(k) Retirement Plan with employer matching.
  • They and their dependents residing in the US are eligible for medical, dental, and vision insurance, as well as the following Company-paid Employee Only benefits: basic life insurance, accidental death and disability insurance, and short- and long-term disability benefits.
  • Regular employees may purchase additional voluntary short-term disability benefits, and participate in a Health Savings Account (HSA) as well as a Flexible Spending Account (FSA) for healthcare, dependent child care, and/or commuting expenses as allowable under IRS guidelines.
  • Benefits offerings vary in Puerto Rico.
  • Part-time employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) Retirement Plan with employer matching.
  • Full-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year) and are eligible to participate in the Company's 401(k) program with employer matching.
  • They and their dependents residing in the US are eligible for medical, dental, and vision insurance.
  • Part-time temporary employees receive 6 days of paid sick leave each year (pro-rated for new hires throughout the year).
  • All US employees who work in a state or locality with more generous paid sick leave benefits than specified here will receive the benefit of those sick leave laws.
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