Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Defines SoC or subsystem level clocking targets and drives design teams to achieve these objectives as required. Builds simulation models, drives physical implementation, conducts clock analysis, and supports power grid methodologies and implementation. Creates scalable flows for clocking infrastructure for better performance and power in the design. Interacts with architecture and IP/SoC design teams to understand clocking requirements and helps them in deciding the right clock distribution methodology based on power and performance requirements. This position offers work remotely if not co-located at the Fort Collins, CO site.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
Job Type
Full-time
Career Level
Mid Level
Number of Employees
5,001-10,000 employees