Physical Design Intern

Ambiq Micro, Inc. • Austin, TX

2d

About The Position

Ambiq's mission is to enable intelligence everywhere by delivering the lowest power semiconductor solutions. Ambiq is a pioneer and a leading provider of ultra-low-power semiconductor solutions based on our proprietary and patented sub- and near-threshold technologies. With the increasing power requirements of artificial intelligence (AI) computing, our customers are relying on our solutions to deliver AI to edge environments. Our hardware and software innovations fundamentally deliver a multi-fold improvement in power consumption over traditional semiconductor designs without expensive process geometry scaling. We began in 2010 by addressing the power consumption challenges of battery-powered devices at the edge, where they were most pronounced. As of the beginning of 2025, we've shipped more than 280+ million units worldwide.
Our innovative and fast-moving teams of design, research, development, production, marketing, sales, and operations are spread across several continents, including the US (Austin), Taiwan (Hsinchu), China (Shanghai and Shenzhen), and Singapore. We value relentless technology innovation, a deep commitment to customer success, collaborative problem-solving, and an enthusiastic pursuit of energy efficiency. We embrace candidates who also share these same values. The successful candidate must be self-motivated, creative, and comfortable learning and driving exciting new technologies. We encourage and nurture an environment that fosters growth and opportunities to work on complex, meaningful, and challenging projects, creating a lasting impact and shaping the future of technology. Join us on our quest for enabling billions of intelligent devices. The intelligence everywhere revolution starts here.
Scope
We’re looking for a Physical Design Summer Intern to join our SoC team and help design, tape out ultra low power chips in advanced process nodes. In this role, you’ll gain hands-on experience with physical implementation tools, learn how to deliver best PPA designs, and work alongside experienced engineers to tape out ultra low power products. This internship is an excellent opportunity to apply what you’ve learned in class, explore industry-standard tools, and see how your work connects to the technology powering everyday devices.

Requirements

• Currently pursuing a B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field
• Completed coursework in several of the following areas: Digital logic design
• VLSI design / physical design / ASIC design
• CMOS circuits
• Computer architecture (preferred)
• Familiarity with Verilog or VHDL and digital design concepts (timing, pipelining, clocking)
• Basic understanding of physical design concepts such as placement, routing, timing closure, clock trees, and power grid planning
• Comfortable working in a Linux/UNIX environment
• Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.

Nice To Haves

• Experience (coursework or project) with industry-standard EDA tools for: Logic synthesis
• Place & route (P&R)
• Static timing analysis (STA)
• Scripting experience in Tcl, Python, or Shell for flow automation
• Familiarity with industry-standard flows (e.g., RTL-to-GDS, signoff checks)
• Understanding of process nodes, standard cell libraries, and PVT corners
• Strong analytical, debugging, and problem-solving skills
• Good communication skills and a collaborative mindset

Responsibilities

• Support block-level physical implementation for SoC designs
• Assist with floorplanning, placement, clock tree synthesis (CTS), routing, and timing closure
• Run and analyze static timing analysis (STA) and help debug timing violations (setup/hold)
• Help perform power, signal integrity, and IR drop analysis under guidance
• Contribute to design rule check (DRC) and layout versus schematic (LVS) closure activities
• Develop and maintain scripts (e.g., Tcl, Python, Shell) to automate recurring tasks
• Document methods, results, and learnings; present progress to your mentor and team
• Collaborate with RTL, verification, and physical design engineers to resolve implementation issues

What This Job Offers

• Career Level: Intern
• Number of Employees: 101-250 employees