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APPLE INC has the following available in Austin, Texas. Work with front end (FE) team to understand chip architecture and drive physical verification aspects early in design cycle. Working on full chip design rule checking (DRC), layout vs schematic design rule checking (LVS DRC) and physical design verification (PDV) analysis flows. Work with physical design team, drive methodologies and 'best known methods' to streamline physical design work come up with guidelines and checklists, drive execution, and track progress while offering physical verification support. Support partition owners with PnR activities, set goals, plan short and long-term work, understand dependencies between different domains like top, static timing analysis (STA), block place and route (PNR). Resolve design and flow issues related to physical design, identify potential solutions and drive execution. 40 hours/week.