Physical Design Engineer

Celestial AI • Santa Clara, CA

74d • $185,000 - $215,000

About The Position

We are seeking a highly skilled and experienced Physical Design Engineer to join our team. The ideal candidate will have a strong background in physical design & physical design methodologies for both SOC level and block level. They should have experience that includes floorplanning, hard IP integration, power distribution, Multi-Supply, Multi-Vt, Clock Tree Synthesis, as well as timing budgeting, optimization and timing closure of high-speed designs. Additionally, experience with deep technology nodes such as 5nm/4nm would be highly valued.

Requirements

• Bachelor's degree in Electrical or Computer Engineering (advanced degree preferred).
• Minimum of 5 years of industry experience in physical design.
• Knowledge and hands-on experience with physical design methodologies and implementation.
• Proficiency in relevant EDA physical design and verification tools (e.g., Cadence Innovus, Tempus, Quantus, Voltus, Pegasus) and scripting languages (e.g., Tcl, Perl).
• Experience with custom IP integration.
• Strong understanding of deep technology nodes, preferably TSMC N5.
• Solid understanding of physical design and timing optimization techniques and strategies to achieve physical design and timing closure.
• Proven track record of delivering successful designs on time and meeting performance, power and area goals.
• Excellent problem-solving skills and ability to analyze and debug complex physical design issues.
• Strong communication and collaboration skills to work effectively within cross-functional teams.

Nice To Haves

• Experience with complex clock tree synthesis.
• Knowledge of low-power UPF based physical design flows.
• Knowledge of hierarchical physical design flows, for large chips.
• Understanding of power-aware optimization techniques for low-power designs.
• Understanding process related issues such as OCV, DFM, yield, multi-vt strategies and thermal management.

Responsibilities

• Develop and implement high-performance, low-power, area efficient physical design for SOC and block level designs using industry standard EDA tools.
• Work closely with digital and analog design teams to understand design requirements and constraints to be able to implement physical design.
• Contribute to physical design flow development.
• Resolve or find workarounds for tool issues, independently or working with EDA tool vendors.
• Work closely with synthesis team to help provide feedback on design feasibility, constraints, timing, power, placement and routing issues.
• Perform physical verification, STA, EM & IR Drop analysis.

Benefits

• Competitive base salary.
• Bonus.
• Generous grant of early-stage equity.
• Health, vision, dental and life insurance.
• Collaborative and continuous learning work environment.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Education Level: Bachelor's degree
• Number of Employees: 101-250 employees