Physical Design Engineer

Intel Corporation
1dHybrid

About The Position

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful. Who We Are Intel Custom SOC Group is looking for a Physical Design Engineer to come and work on the latest server products. Your responsibilities are as follows but not limited to: Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis. Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking. Analyzes results and makes recommendations to fix violations for current and future product architecture. Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design to improve product level parameters such as power, frequency, and area. Participates in the development and improvement of physical design methodologies and flow automation. In addition to the skills listed above the ideal candidate will also have excellent communication, teamwork, and problem-solving skills. As well as a willingness to work independently at various levels of abstraction. The ideal candidate will also have excellent communication, teamwork, and problem-solving skills. Intel is in the process of securing office space in Fort Collins, Colorado. Once the site is operational, your position will follow Intel’s hybrid or onsite work model.

Requirements

  • Bachelor's degree in electrical or computer engineering, or a related field with a year of related experience or a Master's degree in electrical or computer engineering, or a related field.
  • 1 year experience with CMOS transistor level circuit fundamentals or VLSI hardware design.
  • 6 months experience with APR tools, either Synopsys Fusion Compiler or Cadence Innovus.
  • 6 months experience with the Static Timing Analysis (STA)
  • 6 months experience with TCL, Python, or Perl programming

Nice To Haves

  • Excellent communication and teamwork skills
  • Experience with Synopsys Fusion Compiler and PrimeTime Electronic Design Automation tools, flows, and methodology
  • Circuit design
  • Layout cleanup expertise DRCs, density, etc.
  • Computer architecture

Responsibilities

  • Performs physical design implementation of custom IP and SoC designs from RTL to GDS to create a design database that is ready for manufacturing.
  • Conducts all aspects of the physical design flow including synthesis, place and route, clock tree synthesis, floor planning, static timing analysis, power/clock distribution, reliability, and power and noise analysis.
  • Conducts verification and signoff including formal equivalence verification, static timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking, and structural design checking.
  • Analyzes results and makes recommendations to fix violations for current and future product architecture.
  • Possesses expertise in various aspects of structural and physical design, including physical clock design, timing closure, coverage analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools.
  • Optimizes design to improve product level parameters such as power, frequency, and area.
  • Participates in the development and improvement of physical design methodologies and flow automation.

Benefits

  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel.
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