Broadcom-posted 6 days ago
$91,000 - $146,000/Yr
Full-time • Mid Level
Fort Collins, CO
5,001-10,000 employees

Broadcom’s ASIC Product Division (APD) is focused on enabling customers to develop products with a sustainable and substantial competitive advantage. APD does this by delivering best in class technology platforms, easy to integrate bleeding edge intellectual property, and by providing world class customer support. APD’s customers span a wide range of industries developing ASICs for the largest and most complex cloud computing AI engines, supercomputers, and networking, through to low power and the most advanced wireless solutions as examples. The PHY Characterization Engineer will be part of a cross functional team developing state of the art die-to-die PHY IP which are used broadly in APD's custom silicon ASIC products. The successful candidate will be a member of the characterization team and will be involved in testing the PHYs as well as developing methodologies assessing their performance. This individual must be highly motivated and capable of working both independently and as part of a team. This position is located in Fort Collins, CO.

  • Develop a deep detailed understanding of Broadcom's die-to-die PHYs.
  • Work with multiple cross functional teams--analog design, digital design, physical composition, DFT to develop functional and characterization plans for PHY IPs
  • Develop characterization scripts as well as report generation automation
  • Execute characterization plans
  • Review and analyze results with cross functional teams
  • A Bachelor’s Degree in Electrical or Computer Engineering or equivalent, and 5+ years of related experience; or Masters degree and 3+ years of related experience
  • Programming experience in at least one of the following languages: Ruby, C, C++, Perl, or Python
  • Experience with Linux and Bash scripting
  • Familiar with basic lab equipment: power supplies, oscilloscopes, cooling equipment, etc.
  • Familiar with BIST test techniques
  • Experience characterizing DDR interfaces
  • Strong debugging skills are a must
  • Experience or coursework with RTL languages (i.e SystemVerilog, Verilog, VHDL)
  • Understanding of the fundamentals of VLSI IC I/O & control, and built-in self-test (BIST)
  • Experience analyzing data with Matlab
  • Experience with plotting software such as Matlab or JMP
  • A basic understanding of communications theory
  • Working knowledge with AI tools such as Chat GPT, Gemini, and/or Cursor
  • Medical, dental and vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • company paid holidays
  • paid sick leave and vacation time
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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