2026 PhD PhD Packaging Design Co-Op/Intern

AMD•San Jose, CA

3d•Hybrid

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. As an AMD intern/co-op , you'll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You'll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you're an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next. We are seeking a highly motivated PhD Packaging Design intern/co-op to join our team and participate in research and development of next-generation product differentiation features with extraordinary ML/AI engineers. This is an excellent knowledge acquiring position with exposure to multiple package families for the FPGA devices. Note: By submitting your application, you are indicating your interest in AMD intern positions. We are recruiting for multiple positions, and if your experience aligns with any of our intern opportunities, a recruiter will contact you. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Requirements

The ideal candidate should have the ability to understand electrical requirements and apply principles learnt in their course work.
This role requires good communication skills and work with a senior engineer.
Ph.D. Candidates in Engineering (Electrical, Mechanical)
Courses in VLSI, EM, packaging
Current working Knowledge of Cadence package design tool is a plus.
Working knowledge of 2D/3D package design and modeling tools, such as Cadence, Ansys, AutoCAD etc. is a plus
Knowledge on DoE, DFM/DFR is a plus.

Responsibilities

Use Cadence tools for design, modeling and simulations.
Use analytical and simulation tools to define package/module design requirements in the project conception stages.
Conduct routing, stack-up & component placement studies in addition to completing the package design activities.
Develop multi-signal package/module models over 50 GHz bandwidth and suitable test structures for model to measurement correlation.
Performing Power Integrity analysis for core as well as IO and generate power delivery network requirements with emphasis on model to measurement correlation
Develop scripts for checking package parameters across device families, maintain a database of electrical design guidelines and rules for IO and PDN package layout implementations.