About The Position

As a Packaging Structural Engineering intern, you will work in the Packaging R&D group on testing, modeling and simulation across semiconductor packaging, flash memory product, and host levels. In this position, you will fulfill tasks set out by supervisors to assist package and product designs, and materials/device characterization, particularly addressing mechanical design and structural reliability issues. You will learn and contribute to innovative solutions to meet increased demands for small form-factor packages with thinner chips, denser interconnects, higher power and more stringent reliability against harsh environment. This position will interface with package & product design, materials engineering, electrical and physical characterization, lab testing, failure analysis, assembly R&D, reliability and other process teams.

Requirements

  • Current student, pursuing a Ph.D. degree in Mechanical Engineering or a relevant major graduating in 2027.
  • Interest in microelectronics packaging industry
  • Proficient in CAD and CAE tools, and a programming language
  • Proficient in Microsoft Office applications
  • Demonstrated strong work ethics

Nice To Haves

  • Exceptional written and verbal communication skill

Responsibilities

  • Conducting simulation tasks of mechanical responses of IC package and flash products
  • Advancing simulation tools for multiscale, multiphysics problems leading to damage and fracture
  • Analyzing, documenting and reporting testing and simulation results
  • Proposing engineering solutions to existing and future challenges facing data storage industry
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