Parametric Test Engineer, Texas Institute for Electronics

The University of Texas at Austin•Austin, TX

14d•Onsite

About The Position

The Texas Institute for Electronics (TIE) is a University of Texas at Austin-supported semiconductor consortium of state and local government, preeminent defense electronics and semiconductor companies, national labs and nationally recognized academic institutions. Our mission is to develop and execute a state-of-the-art 3D Heterogenous Integration manufacturing technology roadmap, and to provide critical pilot manufacturing capabilities to address national security needs and catalyze domestic economic growth. Join the Texas Institute for Electronics (TIE) and help us push the boundaries in critical semiconductor domains, including advanced packaging, with the aim of reestablishing U.S. prominence in semiconductor manufacturing. With over $1 billion in funding from the US DoD and the state of Texas, we’re at the forefront of creating cutting-edge semiconductor manufacturing equipment and processes that will set the course for future advancements in semiconductor logic, memory, heterogeneous integration, chip cooling and more. Situated in the heart of Austin — named “America’s Coolest City” by Expedia and “The Best Place to Live in the U.S.” by U.S. News and World Report — the Texas Institute for Electronics embodies the city’s innovative spirit. UT Austin, recognized by Forbes as one of America’s Best Large Employers , provides outstanding employee benefits and total rewards packages that include: Competitive health benefits (employee premiums covered at 100%, family premiums at 50%) Voluntary Vision, Dental, Life, and Disability insurance options Generous paid vacation, sick time, and holidays Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b) Flexible spending account options for medical and childcare expenses Robust free training access through LinkedIn Learning plus professional conference opportunities Tuition assistance Expansive employee discount program including athletic tickets Free access to UT Austin's libraries and museums with staff ID card Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card For more details, please see: Benefits | Human Resources and UT Austin Employee Experience | Human Resources The DC Parametric Test Engineer/Senior Parametric Test Engineer will be responsible for developing and executing test methodologies to evaluate semiconductor devices' electrical parameters. This role involves working with Source Measure Units (SMUs), switch matrices, and wafer probing systems to ensure accurate and efficient testing processes. The ideal candidate will have a strong background in data analysis, scripting, and statistical methods to interpret test results and drive continuous improvement.

Requirements

Parametric Test Engineer: Bachelor’s degree in electrical engineering, electronics, or a related field and at least four years of proven experience in DC parametric testing within the semiconductor industry.
Senior Parametric Test Engineer: Master’s degree in electrical engineering, electronics, or a related field and at least six years of proven experience in DC parametric testing within the semiconductor industry.
For all levels: Proficiency in operating SMUs, switch matrices, and wafer probing systems.
Strong data analysis skills, with experience in scripting languages such as Python or similar.
Solid understanding of statistical analysis methods, including gauge R&R, hypothesis testing, and regression analysis.
Excellent problem-solving abilities and attention to detail.
Strong communication skills, with the ability to work effectively in a collaborative team environment.

Nice To Haves

Master’s degree or higher in electrical engineering, electronics, or a related field.
More than six years of proven experience in DC parametric testing within the semiconductor industry
Database experience.
Familiarity with semiconductor device physics and fabrication processes.
Knowledge of data visualization tools and techniques.

Responsibilities

Develop and implement DC parametric test procedures for semiconductor devices using SMUs, switch matrices, and wafer probing equipment.
Collaborate with cross-functional teams to define test requirements and ensure alignment with project objectives.
Perform data analysis on test results, utilizing scripting languages such as Python to automate data collection and processing.
Apply statistical analysis techniques, including gauge Repeatability and Reproducibility (R&R), hypothesis testing, and regression analysis, to assess test accuracy and reliability.
Troubleshoot and resolve issues related to test equipment and procedures to maintain high-quality testing standards.
Document test methodologies, results, and analysis to support knowledge sharing and continuous improvement initiatives.
Other related functions as assigned.

Benefits

Competitive health benefits (employee premiums covered at 100%, family premiums at 50%)
Voluntary Vision, Dental, Life, and Disability insurance options
Generous paid vacation, sick time, and holidays
Teachers Retirement System of Texas, a defined benefit retirement plan, with 8.25% employer matching funds
Additional Voluntary Retirement Programs: Tax Sheltered Annuity 403(b) and a Deferred Compensation program 457(b)
Flexible spending account options for medical and childcare expenses
Robust free training access through LinkedIn Learning plus professional conference opportunities
Tuition assistance
Expansive employee discount program including athletic tickets
Free access to UT Austin's libraries and museums with staff ID card
Free rides on all UT Shuttle and Austin CapMetro buses with staff ID card