Packaging Engineer V - (E5)

Applied MaterialsSanta Clara, CA
6d$154,000 - $212,000Onsite

About The Position

Applied Materials is a global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers manufacture display and semiconductor chips – the brains of devices we use every day. As the foundation of the global electronics industry, Applied enables the exciting technologies that literally connect our world – like AI and IoT. If you want to push the boundaries of materials science and engineering to create next generation technology, join us to deliver material innovation that changes the world. You’ll benefit from a supportive work culture that encourages you to learn, develop, and grow your career as you take on challenges and drive innovative solutions for our customers. We empower our team to push the boundaries of what is possible—while learning every day in a supportive leading global company. Visit our Careers website to learn more. At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Learn more about our benefits . The successful candidate will be in Santa Clara , CA as a member of a global diverse cross functional team responsible for developing new modules in Advanced Semiconductor Packaging. Key Attributes : D omain expert ise in advanced pa ckaging areas such as W2W / D2W bonding, micro bump s, TSV, thermal management , optic s and multi-wafer stacking with deep understanding of materials , process , device physics and integration . Ability to drive new materials and process development to enable new inflections in logic, DRAM and NAND through structured problem-solving methodology . Proven track record of solving complex problems through innovation and ideation of novel approaches. Ability to d efin e and develop differentiated modules by leveraging Applied’s broad portfolio of tools . Thought leader to d efine and maintain Applied’s roadmap i n hybrid and fusion bonding for emerging device architectures

Requirements

  • Minimum of BS/MS in Electrical, Mechanical Engineering, Material Engineering or equivalent
  • 5 years of experience in advanced packaging specializing in logic, DRAM or NAND
  • Experience with MES systems for Si fab processing is a plus
  • Strong communication skills to be effective in dealing with b usiness u nits, cross-functional teams, internal or external customer s
  • Lead project s across organization and culture in a fast-paced environment
  • Self-starter, team player and able to work independently with minimal supervision

Nice To Haves

  • Experience with MES systems for Si fab processing is a plus

Responsibilities

  • D omain expert ise in advanced pa ckaging areas such as W2W / D2W bonding, micro bump s, TSV, thermal management , optic s and multi-wafer stacking with deep understanding of materials , process , device physics and integration
  • Ability to drive new materials and process development to enable new inflections in logic, DRAM and NAND through structured problem-solving methodology
  • Proven track record of solving complex problems through innovation and ideation of novel approaches.
  • Ability to d efin e and develop differentiated modules by leveraging Applied’s broad portfolio of tools
  • Thought leader to d efine and maintain Applied’s roadmap i n hybrid and fusion bonding for emerging device architectures
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