Cadence-posted about 2 months ago
Intern
San Jose, CA
5,001-10,000 employees
Ambulatory Health Care Services

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. You will be a member of an expert R&D team creating technologies and products that enable static and dynamic transistor level analysis and characterization of the most advanced custom digital and mixed-signal circuits built for communication, IOT and AI markets. Your work will be focused on: Enhancing and expanding the existing tools' architecture to cover transistor level modeling for timing analysis and characterization of memory designs. Enhancements for analysis of transistor level effects dominant at lower technology nodes

  • Enhancing and expanding the existing tools' architecture to cover transistor level modeling for timing analysis and characterization of memory designs.
  • Enhancements for analysis of transistor level effects dominant at lower technology nodes
  • Currently pursuing BS or MS in Computer Science, Computer Engineering, Electrical Engineering
  • Industry experience developing and maintaining C++ based applications on a Unix or Linux environment
  • Experience with quality and software processes
  • Experience designing data structures, algorithms, and software engineering principles
  • As a condition of employment with Cadence, newly hired employees will be required to provide Cadence with proof of full vaccination, unless legally entitled to an accommodation.
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service