Member of Technical Staff Physical Design - PnR (Place and Route) Engineer

Semiconductor Components Industries • Allen, TX

92d

About The Position

onsemi is seeking an energetic, motivated professional to join their product development team located in Richardson, Texas. You will join a cohesive group of experienced designers with a wide range of industry experience who cultivate a “customer first” culture and friendly working environment. Projects will require you to work with cross-functional teams comprised of logic and IP design, physical implementation, packaging, test, and product engineering.

Requirements

• PhD, MS or BS in Electrical Engineering, or Computer Engineering.
• 10+ years of direct design experience in custom IC flows as a physical design engineer.
• In depth knowledge of hierarchical and low power design techniques.
• Knowledge of CMOS devices, circuit design, layout, and verification.
• Experience with synthesis, interfacing with RTL and implementation designers to achieve better quality of results.
• Experience qualifying vendor tools and internally developed software releases.
• Proficiency in scripting with languages such as Tcl, Python, and Perl.
• Familiarity with software and editing tasks in a Linux operating system environment.
• Excellent writing and verbal communication skills.
• Ability to work independently and on a team while interfacing with team members located all over the world.

Nice To Haves

• Knowledge and experience in vetting and deploying sophisticated EDA software flows.
• Hands-on experience with FinFET technologies.
• Mixed-signal physical design experience.

Responsibilities

• Responsible for Physical Design tasks at block, subsystem, sub-chip, and/or full-chip levels.
• Tasks include Floorplanning, Placement, CTS and custom clocking, Routing, Formal Equivalency, Power Efficiency, IR-Drop, and EM.
• Involved in Physical Design flow development/automation and evaluation of and recommendations for technology, IP, and vendor selection.
• Analog block integration, including noise isolation for hard-macros, pads, quiet power/ground supplies, and custom analog routes.
• Static Timing Analysis related activities (constraint development, parasitic extraction, sign-off requirements).
• Support SPF Extraction tools such as Cadence Quantis, or Siemens PEX.
• Conduct Physical Verification (DRC/LVS/DFM, chip finishing).
• Work with limited direction, have keen attention to detail, and provide crisp status of progress, issues, and risks on each program to the management team.
• Occasional travel may be required.
• Provide technical leadership, project planning, and resource management.
• Collaborate to find solutions for problems that occur during the design process.
• Communicate directly with internal and external customers on design status and technical implementation.
• Mentor junior engineers and provide training and guidance for a variety of design tasks.

What This Job Offers

• Industry: Computer and Electronic Product Manufacturing
• Education Level: Ph.D. or professional degree