Machine Learning Engineer

Altera • San Jose, CA

2d

About The Position

Altera is a global leader in programmable logic solutions, delivering high performance FPGA technology that powers next generation cloud, networking, and edge applications. With a renewed focus on agility, software first usability, and hardware accelerated innovation, Altera is shaping the future of computing. Join us as we build the next wave of AI optimized FPGA platforms and tools!

About the Role We are seeking a Machine Learning Engineer to help drive the development, optimization and deployment of Altera FPGA Compiler. In this role, you will work at the intersection of machine learning and compiler/toolchain development, enabling customers to achieve breakthrough performance and efficiency on programmable logic. You will collaborate closely with hardware architects, software engineers, and IP developers to design ML models, optimize inference pipelines, and contribute to the evolution of Altera’s FPGA Compiler.

Requirements

• Bachelor’s Degree or higher in Computer Science, Electrical Engineering, or a related field.
• 10+ years of experience in machine learning development, model optimization or ML systems engineering.
• Experience with C++ and Python in production or research environments.
• Applicants must be eligible for any required U.S. export authorizations.

Nice To Haves

• Experience with Agile methodologies, GitHub Copilot or similar AI coding assistants, and high-performance computing environments.
• Familiarity with edge AI inference on FPGAs and neuro-symbolic AI techniques.
• Strong communication skills for cross-functional collaboration and presenting results at conferences like DAC or FPGA World.

Responsibilities

• Develop, optimize, and deploy advanced machine learning technologies to enhance FPGA compiler performance, focusing on timing closure, resource utilization, and power efficiency.
• Evaluate and integrate emerging ML models (e.g., graph neural networks, reinforcement learning) and frameworks (e.g., PyTorch, TensorFlow) for compiler optimization tasks like placement, routing, and logic synthesis.
• Build robust tools, scripts, and CI/CD workflows to automate model conversion, quantization, pruning, and deployment within the FPGA design flow, ensuring compatibility with EDA tools like Quartus.
• Collaborate with customers, FPGA architects, and internal engineering teams to gather ML requirements, define success metrics, and deliver tailored, production-ready solutions.
• Design and execute comprehensive benchmarks to measure ML-optimized compiler performance across diverse FPGA families (e.g., Agilex, Stratix), analyzing metrics such as compile time, QoR, and scalability.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level