Nvidia-posted 7 months ago
$108,000 - $212,750/Yr
Full-time • Entry Level
Santa Clara, CA
Computer and Electronic Product Manufacturing

We are now hiring for a Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. Make the choice to join us today. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVIDIA's latest groundbreaking technology that enables and accelerates gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as industry-leading proprietary high-speed protocols, and will serve as one of the key IPs in many complex SoC. You'll work closely with analog designers and system architects to independently come up with micro-architecture specification and refine adaptation algorithms. You'll then implement the RTL in SystemVerilog, define test cases that will deeply verify the design and carry out test creations. Next is to define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need to understand the analog schematics and write SystemVerilog models that collect the functionality of those circuits in the most detailed way.

  • RTL design of high-speed digital logic and behavioral modeling of analog circuits.
  • Work with ASIC controller teams to define a unified interface.
  • Collaborate with Physical design engineers for floor planning and define timing constraints.
  • Conduct silicon bringup and build scripts for debug, QA, characterization, and ATE.
  • Pursuing a MS or PhD in Electrical Engineering or equivalent experience.
  • Exposure to Serdes interfaces and high-speed I/O digital design.
  • Deep understanding of Verilog or SystemVerilog, logic design, and circuit modeling in RTL for mixed-signal blocks.
  • Exposure to custom digital circuit design and adaptation algorithms, such as DFE, CTLE, CDR, and offset cancellation.
  • Experience with static timing tools (nanotime, primetime) and formal verification tools.
  • Strong background in Perl and Python scripting.
  • Background in computer architecture and deep learning.
  • Understanding of Serial IO protocols like PCIe and Ethernet.
  • Knowledge of encoding and error correction.
  • Understanding and modeling of Feedback control systems using tools like Matlab & Simulink.
  • Equity and benefits.
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