Lead Speed and Reliability Engineer - DFP

Nvidia•Santa Clara, CA

40d

About The Position

NVIDIA is the industry leader in high performance computing, gaming and AI. Our GPUs and SOCs give outstanding performance and efficiency, revolutionizing myriad fields like cell research, robotics, crypto mining and so many more. We revolutionized the AI world by inventing CUDA. And we are just getting started. Silicon Solutions Group (SSG) is a multifaceted, multi-functional team at NVIDIA. We sit at the crossroads of design, architecture, marketing and productization. We architect and deliver innovative solutions for various markets like Gaming, Datacenters, Servers, Automotive and Embedded. We are fast-paced, dynamic, share a sense of humor and collaborate extensively to push the boundaries of what is possible. Design for Productization, DFP for short, is a group within SSG with focus on SOL methodology, design, testplan and tools to efficiently enable, test and deploy new chip features. The group is muti-faceted, working across SSG and other partner teams, to enable efficient testing and deploy feature at SOL quality and efficiency. The DFP team is looking for a Speed and Reliability Lead. You will be leading and crafting testability features related to Speed, Timing and Reliability from ground up as you help turbocharge NVIDIA's chips into groundbreaking consumer, professional, server, mobile, and automotive solutions.

Requirements

MS in EE, CE, Systems Engineering (or equivalent experience) and 8+ years of experience in a related hardware engineering position.
Previous engineering experience in CPU/GPU/SOC NPI bringup, with focus on driving methodologies and testplans. Familiarity with silicon bringup and tuning a plus, related to timing, speed, reliability and power.
Familiarity with STA timing closure, circuit design, noise characterization, product binning methods and/or performance/power optimization techniques.

Nice To Haves

Familiarity with statistical methods and tools for data analysis
Background with substrate and power supply noise analysis and mitigation
A "go-getter, can get it done" attitude and independent 'out-of-box' thinking.

Responsibilities

Driving methodology and design for NVIDIA testing and deploying new HW features. Crafting related tools and methods to ensure SOL, efficient testing meeting quality benchmarks. Scope spans from datacenter to chip level.
Creating productization processes and methodologies to guide SSG teams on templates to characterize, test and release state-of-art products. Specify critical metrics to meet across process and improve these based on findings.
Prototype and fine-tune these on pre-production silicon (including test chips) fabricated using innovative processes for speed, performance, power, yield and quality.
Provide guidance to silicon facing teams on how to take the feature to productization, including hands-on bringup for feature validation.
Collate takeaways from silicon and correlate to design. Provide feedback to improve the feature in future, thus being responsible for the feature roadmap for all NVIDIA products.
Collaborating with the best minds in NVIDIA across various teams (System Architecture, PDE, Application Engineering, Product Manager, Sales, Operations) in a dynamic, creative work environment to bring industry-defining products to market.