Lead RF ATE Engineer, Amazon Leo Silicon Team

Amazon • Redmond, WA

6d

About The Position

latency, high-speed broadband connectivity to un-served and under-served communities around the world. Come work at Amazon! As a Lead ATE Test Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design and develop innovative Test software solutions for products developed for and deployed in Amazon Leo phased array antennas in LEO satellites and ground terminal products. You’ll be responsible for defining and developing characterization/validation test methodology of mm-wave RFICs for Amazon Leo custom silicon. You will focus on building modular test solutions for use in high-volume production. You must be responsive, flexible and able to succeed within an open collaborative peer environment. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Requirements

• Bachelor's degree in Electrical or Communications Engineering or a related field
• 5 or more years of employment in ATE test development focused on RF and Analog silicon.
• Up to 20% international travel required.
• Excellent oral and written communications skills, both oral and written, with the ability to convey complex technical information effectively.
• Comprehensive understanding of semiconductor product development lifecycle and high-volume manufacturing production flow
• Knowledge of fundamental challenges in RFIC characterization including noise figure measurement accuracy, gain compression analysis, intermodulation distortion testing, and S-parameter validation, with experience troubleshooting and resolving issues related to impedance matching, signal integrity, and measurement repeatability
• Demonstrate familiarity with device security features and protocols including secure boot mechanisms, cryptographic key management, and authentication schemes, with ability to develop and execute ATE test strategies to verify security functionality and compliance
• Knowledge in scripting language to optimize working process as well as experience using Source code control tools (Git, SVN, bitbucket) and bug tracking tools (JIRA).
• Test automation of bench equipment for digital electronics (e.g. pattern generators, logic analyzers) and RF electronics (e.g. spectrum analyzers, VNAs).
• Knowledgeable in production control processes, statistical analysis platforms (Galaxy, Spotfire, JMP or similar), data interpretation/analysis, Cp/Cpk, and bench/tester correlation.

Nice To Haves

• Master's degree or Ph.D. degree in Electrical Engineering or related field
• 7+ years of experience in debugging complex test failures, developing and optimizing ATE code for Uflex or Advantest platforms including test program architecture design, and bringing up test software and hardware systems from initial characterization through high-volume production qualification

Responsibilities

• Implement and optimize RF, mixed signal, and high-speed interface test routines for high-volume manufacturing.
• Design, develop, and verify on-chip calibration techniques for analog and mixed-signal circuits, including implementation of calibration algorithms, validation of calibration accuracy across process/voltage/temperature (PVT) corners, and development of ATE test methodologies to ensure proper calibration functionality and performance optimization
• Develop and execute test strategies for on-chip one-time programmable (OTP) memory, including understanding of programming mechanisms, verification methodologies, and common challenges such as bit yield optimization, programming voltage margins, redundancy schemes, and post-programming reliability validation
• Collaborate with system architecture and design teams to define, implement, and validate on-chip test features including built-in self-test (BIST), scan chains, JTAG interfaces, and design-for-test (DFT) structures to enable comprehensive production test coverage and facilitate efficient debug and failure analysis
• Optimize ATE test time through parallel testing strategies, adaptive test algorithms, and intelligent test flow sequencing while maintaining rigorous data quality standards through statistical process control (SPC), outlier detection, and correlation analysis to ensure production test efficiency without compromising yield learning or product reliability

Benefits

• health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage)
• 401(k) matching
• paid time off
• parental leave

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees