In this role, you will work on leading-edge packaging technologies to enable AI architectures that set new industry standards for compute power, performance, and efficiency. As part of the Packaging Technology team, you will serve as the lead assembly process integrator. Your responsibilities will include developing assembly process technologies and generating assembly/test design rules for Heterogeneous Integrated co-packaged optics technologies by collaborating with design teams, silicon and photonics foundries, and OSAT partners. You will be responsible for developing test chip strategies, managing test chip design, and appropriately planning and managing design of experiments with partners. Additionally, you will work closely with package and system architects to incorporate manufacturability considerations into product definitions. The results of your work will lead to advanced package designs that meet assembly and reliability requirements, while delivering leading-edge products for data centers and the high-end compute segment.
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Job Type
Full-time
Career Level
Mid Level
Education Level
Ph.D. or professional degree