IP Verification Engineer

Advanced Micro Devices-posted 2 months ago
Full-time • Entry Level
Hybrid • San Jose, CA
5,001-10,000 employees
Computer and Electronic Product Manufacturing
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At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. As a verification engineer in the AECG Group, you will help bring to life cutting-edge FPGA, ASICs for variety of target customers. As a member of the front-end design/integration team, you will work closely with the architecture, IP design, PD teams, and product engineers to achieve first pass silicon success.

  • Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
  • Develop test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
  • Code IP or SS level UVM based testbenches, verification components - monitors, scoreboard, checkers
  • Build the directed and random verification tests
  • Run regressions, debug test failures towards ensuring high design functional, performance and implementation quality
  • Proficient in IP level ASIC verification
  • Expert in Verilog, System Verilog, Object Oriented programming
  • Expertise in developing UVM based verification frameworks and testbenches
  • Scripting and automation of verification processes and flows
  • Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out
  • Good Computer Architecture, systems knowledge
  • Comfortable in python / perl and editing / maintaining scripts
  • Experience with PCIe, CXL, NVMe or ethernet protocols
  • Strong communication skills and the ability to work independently as well as in a cross-site team environment
  • Exposure to leadership or mentorship is an asset
  • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
  • Exposure to generative AI or simulation tools for test, testbench, assertion, test plan generation or performance optimization is a plus
  • AMD benefits at a glance
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