IP Design Verification Engineer

Intel CorporationSanta Clara, CA
1dHybrid

About The Position

We are seeking a skilled IP Design Verification Engineer to join our team and play a critical role in ensuring the functional integrity of our intellectual property designs. This position involves comprehensive verification of IP logic blocks, development of robust verification environments, and collaboration with cross-functional teams to deliver high-quality silicon solutions.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field with 6+ years of experience in digital design verification or related semiconductor engineering role
  • Experience in developing System Verilog & UVM based testbench for IP, subsystem or SoC level validation.
  • Experience programming skills in Python (preferred) or other scripting language.
  • Experience with verification tools such as Synopsys VCS, Cadence Xcelium, or Mentor Questa
  • Experience with creating directed and random test cases and developing/maintaining test plans.
  • Experience with design verification and validation methodologies and strategies.
  • Experience with version control systems (Git, Perforce)

Nice To Haves

  • Master's degree in Electrical Engineering, Computer Engineering, or related field with 5+ years of experience in IP or SoC verification environments
  • Proficient in validating and debugging NOC, Data path, Interconnects, Clock and resets, Power management designs.
  • Formal verification techniques
  • Power-aware verification and low-power design verification
  • Experience with emulation platforms (Palladium, Veloce, Zebu)
  • CPU/GPU architecture and microarchitectural verification
  • Continuous integration and regression management systems

Responsibilities

  • Perform comprehensive functional verification of IP or subsystem logic blocks to ensure compliance with specification requirements
  • Develop and execute detailed verification plans, test benches, and verification environments with comprehensive coverage metrics
  • Create and maintain system simulation models to verify design functionality, analyze power consumption, and assess timing characteristics
  • Oversee development of UVM-based testbenches, constrained-random stimulus, and coverage closure
  • Identify, replicate, and debug issues in presilicon environments using advanced debugging methodologies
  • Implement corrective measures and resolution strategies for failing test cases and verification scenarios
  • Collaborate closely with system architects, RTL design engineers, and physical design teams to enhance verification of complex architectural features
  • Document comprehensive test plans and facilitate technical reviews with design and architecture stakeholders
  • Maintain and continuously improve existing functional verification infrastructure, tools, and methodologies.
  • Ensure compliance with industry-standard verification practices and maintain high-quality standards.
  • Demonstrate innovation in verification processes, including AI/ML-driven verification or developing custom automation scripts.
  • Evaluate new verification technologies and incorporate them to continuously improve efficiency and effectiveness.
  • Ensure verification completeness across all IP functional domains.
  • Partner with cross-functional teams to ensure seamless integration and verification sign-off.

Benefits

  • We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
  • Find out more about the benefits of working at Intel.
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