IP & Design Engineering Intern (Summer 2026)

GlobalFoundries • Richardson, TX

99d • $20 - $40

About The Position

GlobalFoundries (GF) is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GF makes possible the technologies and systems that transform industries and give customers the power to shape their markets. Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.

Requirements

• Education - MS/PhD in Electrical Engineering or other related discipline.
• Must have transistor level circuit design understanding.
• Knowledge and experience with RF/mm-Wave circuit design.
• Proficient with Cadence based EDA tools.
• Language Fluency - English (Written & Verbal).
• Ability to work at least 40 hours per week during the internship.

Nice To Haves

• MS/PhD in RF, mm-Wave, Mixed-Signal, Analog IC design field.
• Knowledge of RF transceiver building block design (PA, LNA, VCO, PLL, MIX, VGA, etc.).
• Knowledge of RF CMOS technologies (Bulk, SOI) is preferred.
• Prior related internship or co-op experience.
• Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
• Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
• Strong written and verbal communication skills.
• Strong planning & organizational skills.

Responsibilities

• Design and tape-out mm-Wave reference circuits on internal test chips and MPWs.
• Use industry-standard design tools to perform schematic design, physical layout, parasitic extractions, pre- and post-layout simulations, and Elector-Magnetic (EM) simulations.
• Perform circuit optimizations to meet performance requirements.
• Collaborate with design leads on multiple concurrent projects.
• Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.

Benefits

• Expected Salary Range $20.00 - $40.00
• The exact Salary will be determined based on qualifications, experience and location.

What This Job Offers

• Career Level: Intern
• Education Level: Master's degree
• Number of Employees: 5,001-10,000 employees