Intern - Layout AI-Automation

Micron TechnologySan Jose, CA
27d

About The Position

Manage and maintain datasets used for tool validation, including labeling and preparation. Perform functional and regression testing on co-pilot tools and design workflows Verify layout automation results and identify issues or opportunities for improvements Collaborate with engineers to fix and resolve tool or layout issues. Document test cases, results, and process updates clearly and thoroughly. Graduate students with strong course and project background in Generative AI and Agentic Flows. Strong programming experience (Python and PyTorch) Project work on building domain specific reasoning agents with prompting, fine tuning, and/or continuous pretraining. Project work on building data pipelines for training. Strong communication skills - able to work effectively within multi-functional teams. Understanding of full-custom CMOS layout fundamentals for mixed-signal designs GitHub portfolio with open-source contributions. Course work in VLSI, Optimization Basic knowledge of memory circuit components such as sense amplifiers, charge pumps, SERDES, and CMOS logic. Familiarity with chip design flow, memory layout flows and design verification processes. Basic programming experience with SKILL/LISP.

Requirements

  • Graduate students with strong course and project background in Generative AI and Agentic Flows.
  • Strong programming experience (Python and PyTorch)
  • Project work on building domain specific reasoning agents with prompting, fine tuning, and/or continuous pretraining.
  • Project work on building data pipelines for training.
  • Strong communication skills - able to work effectively within multi-functional teams.
  • Understanding of full-custom CMOS layout fundamentals for mixed-signal designs
  • GitHub portfolio with open-source contributions.
  • Course work in VLSI, Optimization
  • Basic knowledge of memory circuit components such as sense amplifiers, charge pumps, SERDES, and CMOS logic.
  • Familiarity with chip design flow, memory layout flows and design verification processes.
  • Basic programming experience with SKILL/LISP.

Responsibilities

  • Manage and maintain datasets used for tool validation, including labeling and preparation.
  • Perform functional and regression testing on co-pilot tools and design workflows
  • Verify layout automation results and identify issues or opportunities for improvements
  • Collaborate with engineers to fix and resolve tool or layout issues.
  • Document test cases, results, and process updates clearly and thoroughly.
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