Assist HBM Architecture Interns in advancing High Bandwidth Memory (HBM) DRAM products using analog and digital circuit expertise.
Collaborate with HBM Build Architects on the composition and development of next-generation HBM DRAM products.
Apply analog/digital circuit development expertise in fields like memory arrays, high-speed interfaces, and custom logic.
Support multi-functional initiatives involving Build Engineering, Product Engineering, and Process Development.
Contribute to architectural decisions impacting high-performance computing and 2.5D/3D packaging.
Communicate technical findings and compose insights for internal teams and leadership.
Actively working towards a graduate degree or similar experience (Master's or PhD or equivalent experience preferred) in Electrical Engineering, Computer Engineering, or a related domain.
Experience with CMOS circuit development and understanding of semiconductor device physics.
Knowledge of digital (Verilog) and/or analog (FastSpice, HSPICE) modeling and simulation.
Strong verbal and written communication skills.
Ability to synthesize and convey complex technical concepts effectively.
Experience in DRAM memory array composition, high-speed clocking/interface invention, or power delivery optimization.
Familiarity with 2.5D and 3D packaging technologies.
Familiarity with logic and tailored circuit composition methods.
Collaborative outlook with a proactive approach to problem-solving.
Previous internship or project experience in memory architecture or semiconductor development.
Choice of medical, dental and vision plans.
Benefit programs that help protect your income if you are unable to work due to illness or injury.