Develop an understanding of process and device requirements for new memory cell, access device, and selectors and help refine requirements, as necessary. Characterize array and model cell device properties to identify improvement opportunities (product bias setting, process integration, design waveform, etc). Contribute to the cell material and process flow definition, particularly in the area of device physics and array analysis, as well as conntributing to the definition and validation of the cell electrical specifications for product qualification. Understand and develop models for fundamental yield-limiting mechanisms in new memory technologies through statistical data analysis of experiments conducted in semiconductor fab. Evaluate in-line, probe, parametric, and back end data. Correlate array reliability and characterization testing to product reliability. Define, support and gather data on media management techniques, on-chip and in system to improve performance and reliability of end product.
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Career Level
Intern
Education Level
Ph.D. or professional degree
Number of Employees
5,001-10,000 employees