About The Position

Broadcom’s ASIC Product Division (APD) is focused on enabling customers to develop products with a sustainable and substantial competitive advantage. APD does this by delivering best in class technology platforms, easy to integrate bleeding edge intellectual property, and by providing world class customer support. APD’s customers span a wide range of industries developing ASICs for the largest and most complex cloud computing AI engines, supercomputers, networking, to low power and most advanced wireless solutions, as some examples. The Interface and Analog IP RTL Design Manager position is part of a cross functional design team developing HBM and die-to-die PHY IP. The PHYs are used broadly in APD's custom silicon ASIC products. The successful candidate will lead the team that architects and writes the RTL code that creates the digital function and integrates the analog functions required to realize the IP. This manager will work closely with the physical design team that builds the design in leading edge CMOS technologies and with the lab team that supports silicon validation of the manufactured design. This individual must have strong technical and leadership skills, be highly motivated and be capable of working effectively as part of a team. This position is in Fort Collins, CO.

Requirements

  • 15+ years of engineering experience including 5+ years in people management and employee development.
  • Legal authorization to work in the U.S.
  • Strong leadership skills
  • Strong verbal, written communication, and presentation skills.
  • Ability to multitask and manage multiple technical issues in parallel.
  • Well organized, methodical, and detail oriented

Nice To Haves

  • Bachelor's Degree or Masters Degree in Electrical Engineering, Computer Engineering or Computer Science.
  • Proficiency in digital design including RTL design techniques and tools
  • Experience with HBM, DDR, die-to-die PHY development
  • Program Management skills – working knowledge of making appropriate tradeoffs between scope, schedule and resources to manage very complex programs from cradle to grave

Responsibilities

  • Lead and contribute to the architecture of the next generation IP functions.
  • Lead & manage a team of high performance RTL design engineers in the development of complex RTL code
  • Manage a robust design process focused on high quality design creation through clear design definition and thorough design reviews and verification.
  • Ensure on-time execution and first-time right silicon for all IP that is developed.
  • Fully manage projects including planning, tracking, and reporting across all design phases of the project.
  • Work effectively as part of a cross-functional team including analog design, physical design, design-for-test, firmware development, silicon validation, customer marketing and ASIC design implementation.
  • Engage and communicate with internal and external ASIC customers.
  • Ability to debug complex design issues both during and after release
  • Build and manage engineering teams including recruiting, training and mentoring team members.

Benefits

  • Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
  • The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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