The IC Layout Engineer position within the High Performance Analog (HPA) division is responsible for developing and verifying integrated-circuit (IC) layouts in close collaboration with design engineers, supporting programs from initial floorplanning through tapeout. The position uses industry-standard EDA tools to complete schematic capture, physical verification (DRC/LVS), and documentation in support of GaAs, Silicon, and GaN technologies. This is a hybrid position where the expectation is to be onsite in our Richardson TX office a minimum of four days a week.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
Job Type
Full-time
Career Level
Mid Level
Number of Employees
1,001-5,000 employees