IC Layout Designer (TSMC FinFET)
Chelsea Search Group•San Jose, CA
3d
About The Position
Immediate need for several Analog Layout Design Engineers with 3-5 years of experience including TSMC FinFET (10nm and below) and Wireless experience a plus.
Requirements
- 3-5 years of experience
- TSMC FinFET (10nm and below)
Nice To Haves
- Wireless experience
Benefits
- medical
- dental
- vision
- PTO
- 401K company match
- bonus opportunity
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Education Level
No Education Listed
