IC Design Engineer

Broadcom • San Jose, CA

4d

About The Position

Seeking an experienced IC Design Engineer to design the digital portions of a high-performance SerDes IP for next-generation communication systems. The ideal candidate will have deep expertise in digital and mixed-signal design, system-level integration, and silicon validation for high-speed interfaces. Job Description: IC Design Engineer Understanding the architecture of transmitters, receivers, equalizers, clock recovery circuits, and other digital components of high-performance SerDes supporting various communication standards. Design, simulate, and optimize SerDes-related digital components taking into consideration factors such as data rate, jitter, and power consumption. Analyze and resolve Lint and Clock/Reset Domain crossing issues in the design Collaborate with the broader engineering team to ensure robust signal integrity and power integrity in SerDes designs. Collaborate with cross-functional teams, including physical design, system engineering, and validation teams, to ensure seamless integration of SerDes IP into larger systems. Prepare and maintain comprehensive design documentation, including specifications, microarchitecture, and test plans. Support silicon bring-up and debug efforts.

Requirements

• BS +12 Years of relevant industry experience. Advanced degree preferred.
• Proven experience in SerDes design with a focus on high-speed communication interfaces.
• Must have strong Logic Design, RTL coding (Verilog HDL) skills.
• Familiarity of analog and mixed-signal circuit design principles.
• Thorough understanding of the impact of process technologies on SerDes design.
• Excellent problem-solving skills and ability to troubleshoot complex mixed-signal IP blocks.
• Familiarity with system-level considerations in high-speed communication interfaces.
• Must understand low power design and validation techniques including UPF.
• Must be familiar with design constraint generation, logic synthesis, timing closure analysis and Clock/Reset domain crossing checks.
• Self-motivated
• Ability to work independently
• Good verbal and written communication skills
• Ability to work with remote and cross functional teams

Responsibilities

• Understanding the architecture of transmitters, receivers, equalizers, clock recovery circuits, and other digital components of high-performance SerDes supporting various communication standards.
• Design, simulate, and optimize SerDes-related digital components taking into consideration factors such as data rate, jitter, and power consumption.
• Analyze and resolve Lint and Clock/Reset Domain crossing issues in the design
• Collaborate with the broader engineering team to ensure robust signal integrity and power integrity in SerDes designs.
• Collaborate with cross-functional teams, including physical design, system engineering, and validation teams, to ensure seamless integration of SerDes IP into larger systems.
• Prepare and maintain comprehensive design documentation, including specifications, microarchitecture, and test plans.
• Support silicon bring-up and debug efforts.

Benefits

• The annual base salary range for this position is $141,300 - $226,000
• This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
• Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time.
• The company follows all applicable laws for Paid Family Leave and other leaves of absence.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level
• Number of Employees: 5,001-10,000 employees