Raytheon Technologies-posted 3 months ago
$82,000 - $164,000/Yr
Full-time • Mid Level
Tucson, AZ
Transportation Equipment Manufacturing

Raytheon is seeking a Hardware in the Loop (HWIL) Senior Systems Integrator with FPGA experience. The role requires development and integration of FPGA solutions across multiple programs. After FPGA delivery and integration, the candidate will continue systems integration tasks including, but not limited to, hardware/software/FPGA interfacing, radar and video emulation, and missile electronics interfacing. The candidate should have FPGA design experience within a multidisciplined team and experience troubleshooting both low level and systemic issues. The candidate should also have experience with software/FPGA interfacing, and both board and system level integration. The candidate will have the responsibility from requirements to completion of integration for all FPGA projects that they own.

  • Develop FPGA solutions across multiple HWIL projects.
  • Coordinate and collaborate within a common department FPGA team and team lead (including other SMEs) to best achieve the needs of our support projects.
  • Help other FPGA developers on the team, particularly those who are new to development.
  • Produce FPGA level requirements that meet system level requirements.
  • Track execution and report status to program stakeholders.
  • Report on status of metrics to stakeholders.
  • Conduct development and sustainment activities such as code reviews and pull requests using git.
  • Develop constraints and have rudimentary experience with device timing closure.
  • Create self-testing and reporting simulations.
  • Adhere to configuration and code management tools such as git.
  • Develop common code and scripting to decrease development time on future efforts.
  • Integrate with software, hardware, and system engineers on a multidisciplined team.
  • Typically requires a Bachelor's Degree in Science, Technology, Engineering or Mathematics (STEM) and 5 years prior relevant experience.
  • Experience examining FPGA vendor documentation and circuit board schematics to find information related to FPGA development, FPGA tool use, and integration.
  • Experience with FPGA timing closure, coding best practices, and build tool flow.
  • Active and transferrable US government issued Secret security clearance (not interim) is required prior to start date.
  • US citizenship is required, as only US citizens are eligible for security clearance.
  • Strong communication skills.
  • Experience in FPGA development, including requirements, implementation, including solving low level and systemic issues.
  • Implementation of basic interfaces such as UART, I2C, and/or SPI.
  • Vivado Block Designer or another FPGA vendor equivalent.
  • FPGA testing and system integration.
  • Self-checking simulations.
  • Experience using VHDL or Verilog.
  • Strong organization, coordination, planning and teaming skills.
  • Experience with Gigabit Transceivers.
  • Experience with electrical standards such as LVDS, RS-422, CMOS, and knowledge of when to use them, and how to troubleshoot.
  • Knowledge of or experience with equipment rack assembly, cable assembly/installation, electronics maintenance, data acquisition systems, oscilloscopes, bus analyzers, logic analyzers, network analyzers, and/or spectrum analyzers.
  • Experience troubleshooting systems using test equipment such as data acquisition systems, oscilloscopes, bus analyzers, logic analyzers, network analyzers, and/or spectrum analyzers.
  • Experience with gate reviews.
  • Existing SSBI clearance.
  • Strong understanding of VHDL.
  • Medical, dental, vision, life insurance.
  • Short-term disability, long-term disability.
  • 401(k) match.
  • Flexible spending accounts.
  • Flexible work schedules.
  • Employee assistance program.
  • Employee Scholar Program.
  • Parental leave.
  • Paid time off and holidays.
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